1 # SPDX-License-Identifier: (GPL-2.0-only OR BS 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/mmc/amlogic 4 $id: http://devicetree.org/schemas/mmc/amlogic,meson-gx-mmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: Amlogic SD / eMMC controller for S905/G 7 title: Amlogic SD / eMMC controller for S905/GXBB family SoCs
8 8
9 description: 9 description:
10 The MMC 5.1 compliant host controller on Aml 10 The MMC 5.1 compliant host controller on Amlogic provides the
11 interface for SD, eMMC and SDIO devices 11 interface for SD, eMMC and SDIO devices
12 12
13 maintainers: 13 maintainers:
14 - Neil Armstrong <neil.armstrong@linaro.org> 14 - Neil Armstrong <neil.armstrong@linaro.org>
15 15
16 allOf: 16 allOf:
17 - $ref: mmc-controller.yaml# 17 - $ref: mmc-controller.yaml#
18 18
19 properties: 19 properties:
20 compatible: 20 compatible:
21 oneOf: 21 oneOf:
22 - const: amlogic,meson-axg-mmc 22 - const: amlogic,meson-axg-mmc
23 - items: 23 - items:
24 - const: amlogic,meson-gx-mmc 24 - const: amlogic,meson-gx-mmc
25 - const: amlogic,meson-gxbb-mmc 25 - const: amlogic,meson-gxbb-mmc
26 26
27 reg: 27 reg:
28 maxItems: 1 28 maxItems: 1
29 29
30 interrupts: 30 interrupts:
31 minItems: 1 31 minItems: 1
32 items: 32 items:
33 - description: mmc controller instance 33 - description: mmc controller instance
34 - description: card detect 34 - description: card detect
35 35
36 clocks: 36 clocks:
37 maxItems: 3 37 maxItems: 3
38 38
39 clock-names: 39 clock-names:
40 items: 40 items:
41 - const: core 41 - const: core
42 - const: clkin0 42 - const: clkin0
43 - const: clkin1 43 - const: clkin1
44 44
45 resets: 45 resets:
46 maxItems: 1 46 maxItems: 1
47 47
48 amlogic,dram-access-quirk: 48 amlogic,dram-access-quirk:
49 type: boolean 49 type: boolean
50 description: 50 description:
51 set when controller's internal DMA engin 51 set when controller's internal DMA engine cannot access the DRAM memory,
52 like on the G12A dedicated SDIO controll 52 like on the G12A dedicated SDIO controller.
53 53
54 power-domains: <<
55 maxItems: 1 <<
56 <<
57 required: 54 required:
58 - compatible 55 - compatible
59 - reg 56 - reg
60 - interrupts 57 - interrupts
61 - clocks 58 - clocks
62 - clock-names 59 - clock-names
63 - resets 60 - resets
64 61
65 unevaluatedProperties: false 62 unevaluatedProperties: false
66 63
67 examples: 64 examples:
68 - | 65 - |
69 #include <dt-bindings/interrupt-controller 66 #include <dt-bindings/interrupt-controller/irq.h>
70 #include <dt-bindings/interrupt-controller 67 #include <dt-bindings/interrupt-controller/arm-gic.h>
71 mmc@70000 { 68 mmc@70000 {
72 compatible = "amlogic,meson-gx-mmc", " 69 compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
73 reg = <0x70000 0x2000>; 70 reg = <0x70000 0x2000>;
74 interrupts = <GIC_SPI 216 IRQ_TYPE_EDG 71 interrupts = <GIC_SPI 216 IRQ_TYPE_EDGE_RISING>;
75 clocks = <&clk_mmc>, <&xtal>, <&clk_di 72 clocks = <&clk_mmc>, <&xtal>, <&clk_div>;
76 clock-names = "core", "clkin0", "clkin 73 clock-names = "core", "clkin0", "clkin1";
77 pinctrl-0 = <&emm_pins>; 74 pinctrl-0 = <&emm_pins>;
78 resets = <&reset_mmc>; 75 resets = <&reset_mmc>;
79 }; 76 };
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