1 # SPDX-License-Identifier: GPL-2.0-only OR BSD 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/mmc/fujitsu 4 $id: http://devicetree.org/schemas/mmc/fujitsu,sdhci-fujitsu.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: Fujitsu/Socionext SDHCI controller (F_S 7 title: Fujitsu/Socionext SDHCI controller (F_SDH30)
8 8
9 maintainers: 9 maintainers:
10 - Kunihiko Hayashi <hayashi.kunihiko@socionex 10 - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
11 11
12 allOf: 12 allOf:
13 - $ref: mmc-controller.yaml# 13 - $ref: mmc-controller.yaml#
14 14
15 properties: 15 properties:
16 compatible: 16 compatible:
17 oneOf: !! 17 enum:
18 - items: !! 18 - fujitsu,mb86s70-sdhci-3.0
19 - const: socionext,synquacer-sdhci !! 19 - socionext,f-sdh30-e51-mmc
20 - const: fujitsu,mb86s70-sdhci-3.0 <<
21 - enum: <<
22 - fujitsu,mb86s70-sdhci-3.0 <<
23 - socionext,f-sdh30-e51-mmc <<
24 20
25 reg: 21 reg:
26 maxItems: 1 22 maxItems: 1
27 23
28 clocks: 24 clocks:
29 maxItems: 2 25 maxItems: 2
30 26
31 clock-names: 27 clock-names:
32 items: 28 items:
33 - const: iface 29 - const: iface
34 - const: core 30 - const: core
35 <<
36 dma-coherent: true <<
37 <<
38 interrupts: <<
39 maxItems: 2 <<
40 31
41 resets: 32 resets:
42 maxItems: 1 33 maxItems: 1
43 34
44 fujitsu,cmd-dat-delay-select: 35 fujitsu,cmd-dat-delay-select:
45 type: boolean 36 type: boolean
46 description: | 37 description: |
47 Indicating that this host requires the C 38 Indicating that this host requires the CMD_DAT_DELAY control to be enabled
48 39
49 unevaluatedProperties: false 40 unevaluatedProperties: false
50 41
51 required: 42 required:
52 - compatible 43 - compatible
53 - reg 44 - reg
54 - clocks 45 - clocks
55 - clock-names 46 - clock-names
56 47
57 examples: 48 examples:
58 - | 49 - |
59 sdhci1: mmc@36600000 { 50 sdhci1: mmc@36600000 {
60 compatible = "fujitsu,mb86s70-sdhci-3. 51 compatible = "fujitsu,mb86s70-sdhci-3.0";
61 reg = <0x36600000 0x1000>; 52 reg = <0x36600000 0x1000>;
62 bus-width = <4>; 53 bus-width = <4>;
63 vqmmc-supply = <&vccq_sdhci1>; 54 vqmmc-supply = <&vccq_sdhci1>;
64 clocks = <&clock 2 2 0>, <&clock 2 3 0 55 clocks = <&clock 2 2 0>, <&clock 2 3 0>;
65 clock-names = "iface", "core"; 56 clock-names = "iface", "core";
66 }; 57 };
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