1 # SPDX-License-Identifier: GPL-2.0 1 # SPDX-License-Identifier: GPL-2.0
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/mmc/mmc-con 4 $id: http://devicetree.org/schemas/mmc/mmc-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: MMC Controller Common Properties 7 title: MMC Controller Common Properties
8 8
9 maintainers: 9 maintainers:
10 - Ulf Hansson <ulf.hansson@linaro.org> 10 - Ulf Hansson <ulf.hansson@linaro.org>
11 11
12 description: | 12 description: |
13 These properties are common to multiple MMC 13 These properties are common to multiple MMC host controllers. Any host
14 that requires the respective functionality s 14 that requires the respective functionality should implement them using
15 these definitions. 15 these definitions.
16 16
17 It is possible to assign a fixed index mmcN 17 It is possible to assign a fixed index mmcN to an MMC host controller
18 (and the corresponding mmcblkN devices) by d 18 (and the corresponding mmcblkN devices) by defining an alias in the
19 /aliases device tree node. 19 /aliases device tree node.
20 20
21 properties: 21 properties:
22 $nodename: 22 $nodename:
23 pattern: "^mmc(@.*)?$" 23 pattern: "^mmc(@.*)?$"
24 24
25 "#address-cells": 25 "#address-cells":
26 const: 1 26 const: 1
27 description: | 27 description: |
28 The cell is the slot ID if a function su 28 The cell is the slot ID if a function subnode is used.
29 29
30 "#size-cells": 30 "#size-cells":
31 const: 0 31 const: 0
32 32
33 # Card Detection. 33 # Card Detection.
34 # If none of these properties are supplied, 34 # If none of these properties are supplied, the host native card
35 # detect will be used. Only one of them shou 35 # detect will be used. Only one of them should be provided.
36 36
37 broken-cd: 37 broken-cd:
38 $ref: /schemas/types.yaml#/definitions/fla 38 $ref: /schemas/types.yaml#/definitions/flag
39 description: 39 description:
40 There is no card detection available; po 40 There is no card detection available; polling must be used.
41 41
42 cd-gpios: 42 cd-gpios:
43 maxItems: 1 43 maxItems: 1
44 description: 44 description:
45 The card detection will be done using th 45 The card detection will be done using the GPIO provided.
46 46
47 non-removable: 47 non-removable:
48 $ref: /schemas/types.yaml#/definitions/fla 48 $ref: /schemas/types.yaml#/definitions/flag
49 description: 49 description:
50 Non-removable slot (like eMMC); assume a 50 Non-removable slot (like eMMC); assume always present.
51 51
52 # *NOTE* on CD and WP polarity. To use commo 52 # *NOTE* on CD and WP polarity. To use common for all SD/MMC host
53 # controllers line polarity properties, we h 53 # controllers line polarity properties, we have to fix the meaning
54 # of the "normal" and "inverted" line levels 54 # of the "normal" and "inverted" line levels. We choose to follow
55 # the SDHCI standard, which specifies both t 55 # the SDHCI standard, which specifies both those lines as "active
56 # low." Therefore, using the "cd-inverted" p 56 # low." Therefore, using the "cd-inverted" property means, that the
57 # CD line is active high, i.e. it is high, w 57 # CD line is active high, i.e. it is high, when a card is
58 # inserted. Similar logic applies to the "wp 58 # inserted. Similar logic applies to the "wp-inverted" property.
59 # 59 #
60 # CD and WP lines can be implemented on the 60 # CD and WP lines can be implemented on the hardware in one of two
61 # ways: as GPIOs, specified in cd-gpios and 61 # ways: as GPIOs, specified in cd-gpios and wp-gpios properties, or
62 # as dedicated pins. Polarity of dedicated p 62 # as dedicated pins. Polarity of dedicated pins can be specified,
63 # using *-inverted properties. GPIO polarity 63 # using *-inverted properties. GPIO polarity can also be specified
64 # using the GPIO_ACTIVE_LOW flag. This creat 64 # using the GPIO_ACTIVE_LOW flag. This creates an ambiguity in the
65 # latter case. We choose to use the XOR logi 65 # latter case. We choose to use the XOR logic for GPIO CD and WP
66 # lines. This means, the two properties are 66 # lines. This means, the two properties are "superimposed," for
67 # example leaving the GPIO_ACTIVE_LOW flag c 67 # example leaving the GPIO_ACTIVE_LOW flag clear and specifying the
68 # respective *-inverted property property re 68 # respective *-inverted property property results in a
69 # double-inversion and actually means the "n 69 # double-inversion and actually means the "normal" line polarity is
70 # in effect. 70 # in effect.
71 wp-inverted: 71 wp-inverted:
72 $ref: /schemas/types.yaml#/definitions/fla 72 $ref: /schemas/types.yaml#/definitions/flag
73 description: 73 description:
74 The Write Protect line polarity is inver 74 The Write Protect line polarity is inverted.
75 75
76 cd-inverted: 76 cd-inverted:
77 $ref: /schemas/types.yaml#/definitions/fla 77 $ref: /schemas/types.yaml#/definitions/flag
78 description: 78 description:
79 The CD line polarity is inverted. 79 The CD line polarity is inverted.
80 80
81 # Other properties 81 # Other properties
82 82
83 bus-width: 83 bus-width:
84 description: 84 description:
85 Number of data lines. 85 Number of data lines.
86 $ref: /schemas/types.yaml#/definitions/uin 86 $ref: /schemas/types.yaml#/definitions/uint32
87 enum: [1, 4, 8] 87 enum: [1, 4, 8]
88 default: 1 88 default: 1
89 89
90 max-frequency: 90 max-frequency:
91 description: | 91 description: |
92 Maximum operating frequency of the bus: 92 Maximum operating frequency of the bus:
93 - for eMMC, the maximum supported freq 93 - for eMMC, the maximum supported frequency is 200MHz,
94 - for SD/SDIO cards the SDR104 mode ha 94 - for SD/SDIO cards the SDR104 mode has a max supported
95 frequency of 208MHz, 95 frequency of 208MHz,
96 - some mmc host controllers do support 96 - some mmc host controllers do support a max frequency upto
97 384MHz. 97 384MHz.
98 So, lets keep the maximum supported valu 98 So, lets keep the maximum supported value here.
99 99
100 $ref: /schemas/types.yaml#/definitions/uin 100 $ref: /schemas/types.yaml#/definitions/uint32
101 minimum: 400000 101 minimum: 400000
102 maximum: 384000000 102 maximum: 384000000
103 103
104 disable-wp: 104 disable-wp:
105 $ref: /schemas/types.yaml#/definitions/fla 105 $ref: /schemas/types.yaml#/definitions/flag
106 description: 106 description:
107 When set, no physical write-protect line 107 When set, no physical write-protect line is present. This
108 property should only be specified when t 108 property should only be specified when the controller has a
109 dedicated write-protect detection logic. 109 dedicated write-protect detection logic. If a GPIO is always used
110 for the write-protect detection logic, i 110 for the write-protect detection logic, it is sufficient to not
111 specify the wp-gpios property in the abs 111 specify the wp-gpios property in the absence of a write-protect
112 line. Not used in combination with eMMC 112 line. Not used in combination with eMMC or SDIO.
113 113
114 wp-gpios: 114 wp-gpios:
115 maxItems: 1 115 maxItems: 1
116 description: 116 description:
117 GPIO to use for the write-protect detect 117 GPIO to use for the write-protect detection.
118 118
119 cd-debounce-delay-ms: 119 cd-debounce-delay-ms:
120 description: 120 description:
121 Set delay time before detecting card aft 121 Set delay time before detecting card after card insert
122 interrupt. 122 interrupt.
123 123
124 no-1-8-v: 124 no-1-8-v:
125 $ref: /schemas/types.yaml#/definitions/fla 125 $ref: /schemas/types.yaml#/definitions/flag
126 description: 126 description:
127 When specified, denotes that 1.8V card v 127 When specified, denotes that 1.8V card voltage is not supported
128 on this system, even if the controller c 128 on this system, even if the controller claims it.
129 129
130 cap-sd-highspeed: 130 cap-sd-highspeed:
131 $ref: /schemas/types.yaml#/definitions/fla 131 $ref: /schemas/types.yaml#/definitions/flag
132 description: 132 description:
133 SD high-speed timing is supported. 133 SD high-speed timing is supported.
134 134
135 cap-mmc-highspeed: 135 cap-mmc-highspeed:
136 $ref: /schemas/types.yaml#/definitions/fla 136 $ref: /schemas/types.yaml#/definitions/flag
137 description: 137 description:
138 MMC high-speed timing is supported. 138 MMC high-speed timing is supported.
139 139
140 sd-uhs-sdr12: 140 sd-uhs-sdr12:
141 $ref: /schemas/types.yaml#/definitions/fla 141 $ref: /schemas/types.yaml#/definitions/flag
142 description: 142 description:
143 SD UHS SDR12 speed is supported. 143 SD UHS SDR12 speed is supported.
144 144
145 sd-uhs-sdr25: 145 sd-uhs-sdr25:
146 $ref: /schemas/types.yaml#/definitions/fla 146 $ref: /schemas/types.yaml#/definitions/flag
147 description: 147 description:
148 SD UHS SDR25 speed is supported. 148 SD UHS SDR25 speed is supported.
149 149
150 sd-uhs-sdr50: 150 sd-uhs-sdr50:
151 $ref: /schemas/types.yaml#/definitions/fla 151 $ref: /schemas/types.yaml#/definitions/flag
152 description: 152 description:
153 SD UHS SDR50 speed is supported. 153 SD UHS SDR50 speed is supported.
154 154
155 sd-uhs-sdr104: 155 sd-uhs-sdr104:
156 $ref: /schemas/types.yaml#/definitions/fla 156 $ref: /schemas/types.yaml#/definitions/flag
157 description: 157 description:
158 SD UHS SDR104 speed is supported. 158 SD UHS SDR104 speed is supported.
159 159
160 sd-uhs-ddr50: 160 sd-uhs-ddr50:
161 $ref: /schemas/types.yaml#/definitions/fla 161 $ref: /schemas/types.yaml#/definitions/flag
162 description: 162 description:
163 SD UHS DDR50 speed is supported. 163 SD UHS DDR50 speed is supported.
164 164
165 cap-power-off-card: 165 cap-power-off-card:
166 $ref: /schemas/types.yaml#/definitions/fla 166 $ref: /schemas/types.yaml#/definitions/flag
167 description: 167 description:
168 Powering off the card is safe. 168 Powering off the card is safe.
169 169
170 cap-mmc-hw-reset: 170 cap-mmc-hw-reset:
171 $ref: /schemas/types.yaml#/definitions/fla 171 $ref: /schemas/types.yaml#/definitions/flag
172 description: 172 description:
173 eMMC hardware reset is supported 173 eMMC hardware reset is supported
174 174
175 cap-sdio-irq: 175 cap-sdio-irq:
176 $ref: /schemas/types.yaml#/definitions/fla 176 $ref: /schemas/types.yaml#/definitions/flag
177 description: 177 description:
178 enable SDIO IRQ signalling on this inter 178 enable SDIO IRQ signalling on this interface
179 179
180 full-pwr-cycle: 180 full-pwr-cycle:
181 $ref: /schemas/types.yaml#/definitions/fla 181 $ref: /schemas/types.yaml#/definitions/flag
182 description: 182 description:
183 Full power cycle of the card is supporte 183 Full power cycle of the card is supported.
184 184
185 full-pwr-cycle-in-suspend: 185 full-pwr-cycle-in-suspend:
186 $ref: /schemas/types.yaml#/definitions/fla 186 $ref: /schemas/types.yaml#/definitions/flag
187 description: 187 description:
188 Full power cycle of the card in suspend 188 Full power cycle of the card in suspend is supported.
189 189
190 mmc-ddr-1_2v: 190 mmc-ddr-1_2v:
191 $ref: /schemas/types.yaml#/definitions/fla 191 $ref: /schemas/types.yaml#/definitions/flag
192 description: 192 description:
193 eMMC high-speed DDR mode (1.2V I/O) is s 193 eMMC high-speed DDR mode (1.2V I/O) is supported.
194 194
195 mmc-ddr-1_8v: 195 mmc-ddr-1_8v:
196 $ref: /schemas/types.yaml#/definitions/fla 196 $ref: /schemas/types.yaml#/definitions/flag
197 description: 197 description:
198 eMMC high-speed DDR mode (1.8V I/O) is s 198 eMMC high-speed DDR mode (1.8V I/O) is supported.
199 199
200 mmc-ddr-3_3v: 200 mmc-ddr-3_3v:
201 $ref: /schemas/types.yaml#/definitions/fla 201 $ref: /schemas/types.yaml#/definitions/flag
202 description: 202 description:
203 eMMC high-speed DDR mode (3.3V I/O) is s 203 eMMC high-speed DDR mode (3.3V I/O) is supported.
204 204
205 mmc-hs200-1_2v: 205 mmc-hs200-1_2v:
206 $ref: /schemas/types.yaml#/definitions/fla 206 $ref: /schemas/types.yaml#/definitions/flag
207 description: 207 description:
208 eMMC HS200 mode (1.2V I/O) is supported. 208 eMMC HS200 mode (1.2V I/O) is supported.
209 209
210 mmc-hs200-1_8v: 210 mmc-hs200-1_8v:
211 $ref: /schemas/types.yaml#/definitions/fla 211 $ref: /schemas/types.yaml#/definitions/flag
212 description: 212 description:
213 eMMC HS200 mode (1.8V I/O) is supported. 213 eMMC HS200 mode (1.8V I/O) is supported.
214 214
215 mmc-hs400-1_2v: 215 mmc-hs400-1_2v:
216 $ref: /schemas/types.yaml#/definitions/fla 216 $ref: /schemas/types.yaml#/definitions/flag
217 description: 217 description:
218 eMMC HS400 mode (1.2V I/O) is supported. 218 eMMC HS400 mode (1.2V I/O) is supported.
219 219
220 mmc-hs400-1_8v: 220 mmc-hs400-1_8v:
221 $ref: /schemas/types.yaml#/definitions/fla 221 $ref: /schemas/types.yaml#/definitions/flag
222 description: 222 description:
223 eMMC HS400 mode (1.8V I/O) is supported. 223 eMMC HS400 mode (1.8V I/O) is supported.
224 224
225 mmc-hs400-enhanced-strobe: 225 mmc-hs400-enhanced-strobe:
226 $ref: /schemas/types.yaml#/definitions/fla 226 $ref: /schemas/types.yaml#/definitions/flag
227 description: 227 description:
228 eMMC HS400 enhanced strobe mode is suppo 228 eMMC HS400 enhanced strobe mode is supported
229 229
230 no-mmc-hs400: 230 no-mmc-hs400:
231 $ref: /schemas/types.yaml#/definitions/fla 231 $ref: /schemas/types.yaml#/definitions/flag
232 description: 232 description:
233 All eMMC HS400 modes are not supported. 233 All eMMC HS400 modes are not supported.
234 234
235 dsr: 235 dsr:
236 description: 236 description:
237 Value the card Driver Stage Register (DS 237 Value the card Driver Stage Register (DSR) should be programmed
238 with. 238 with.
239 $ref: /schemas/types.yaml#/definitions/uin 239 $ref: /schemas/types.yaml#/definitions/uint32
240 minimum: 0 240 minimum: 0
241 maximum: 0xffff 241 maximum: 0xffff
242 242
243 no-sdio: 243 no-sdio:
244 $ref: /schemas/types.yaml#/definitions/fla 244 $ref: /schemas/types.yaml#/definitions/flag
245 description: 245 description:
246 Controller is limited to send SDIO comma 246 Controller is limited to send SDIO commands during
247 initialization. 247 initialization.
248 248
249 no-sd: 249 no-sd:
250 $ref: /schemas/types.yaml#/definitions/fla 250 $ref: /schemas/types.yaml#/definitions/flag
251 description: 251 description:
252 Controller is limited to send SD command 252 Controller is limited to send SD commands during initialization.
253 253
254 no-mmc: 254 no-mmc:
255 $ref: /schemas/types.yaml#/definitions/fla 255 $ref: /schemas/types.yaml#/definitions/flag
256 description: 256 description:
257 Controller is limited to send MMC comman 257 Controller is limited to send MMC commands during
258 initialization. 258 initialization.
259 259
260 fixed-emmc-driver-type: 260 fixed-emmc-driver-type:
261 description: 261 description:
262 For non-removable eMMC, enforce this dri 262 For non-removable eMMC, enforce this driver type. The value is
263 the driver type as specified in the eMMC 263 the driver type as specified in the eMMC specification (table
264 206 in spec version 5.1) 264 206 in spec version 5.1)
265 $ref: /schemas/types.yaml#/definitions/uin 265 $ref: /schemas/types.yaml#/definitions/uint32
266 minimum: 0 266 minimum: 0
267 maximum: 4 267 maximum: 4
268 268
269 post-power-on-delay-ms: 269 post-power-on-delay-ms:
270 description: 270 description:
271 It was invented for MMC pwrseq-simple wh 271 It was invented for MMC pwrseq-simple which could be referred to
272 mmc-pwrseq-simple.yaml. But now it\'s re 272 mmc-pwrseq-simple.yaml. But now it\'s reused as a tunable delay
273 waiting for I/O signalling and card powe 273 waiting for I/O signalling and card power supply to be stable,
274 regardless of whether pwrseq-simple is u 274 regardless of whether pwrseq-simple is used. Default to 10ms if
275 no available. 275 no available.
276 default: 10 276 default: 10
277 277
278 supports-cqe: 278 supports-cqe:
279 $ref: /schemas/types.yaml#/definitions/fla 279 $ref: /schemas/types.yaml#/definitions/flag
280 description: 280 description:
281 The presence of this property indicates 281 The presence of this property indicates that the corresponding
282 MMC host controller supports HW command 282 MMC host controller supports HW command queue feature.
283 283
284 disable-cqe-dcmd: 284 disable-cqe-dcmd:
285 $ref: /schemas/types.yaml#/definitions/fla 285 $ref: /schemas/types.yaml#/definitions/flag
286 description: 286 description:
287 The presence of this property indicates 287 The presence of this property indicates that the MMC
288 controller\'s command queue engine (CQE) 288 controller\'s command queue engine (CQE) does not support direct
289 commands (DCMDs). 289 commands (DCMDs).
290 290
291 keep-power-in-suspend: 291 keep-power-in-suspend:
292 $ref: /schemas/types.yaml#/definitions/fla 292 $ref: /schemas/types.yaml#/definitions/flag
293 description: 293 description:
294 SDIO only. Preserves card power during a 294 SDIO only. Preserves card power during a suspend/resume cycle.
295 295
296 wakeup-source: 296 wakeup-source:
297 $ref: /schemas/types.yaml#/definitions/fla 297 $ref: /schemas/types.yaml#/definitions/flag
298 description: 298 description:
299 SDIO only. Enables wake up of host syste 299 SDIO only. Enables wake up of host system on SDIO IRQ assertion.
300 300
301 vmmc-supply: 301 vmmc-supply:
302 description: 302 description:
303 Supply for the card power 303 Supply for the card power
304 304
305 vqmmc-supply: 305 vqmmc-supply:
306 description: 306 description:
307 Supply for the bus IO line power, such a 307 Supply for the bus IO line power, such as a level shifter.
308 If the level shifter is controlled by a 308 If the level shifter is controlled by a GPIO line, this shall
309 be modeled as a "regulator-fixed" with a 309 be modeled as a "regulator-fixed" with a GPIO line for
310 switching the level shifter on/off. 310 switching the level shifter on/off.
311 311
312 mmc-pwrseq: 312 mmc-pwrseq:
313 $ref: /schemas/types.yaml#/definitions/pha 313 $ref: /schemas/types.yaml#/definitions/phandle
314 description: 314 description:
315 System-on-Chip designs may specify a spe 315 System-on-Chip designs may specify a specific MMC power
316 sequence. To successfully detect an (e)M 316 sequence. To successfully detect an (e)MMC/SD/SDIO card, that
317 power sequence must be maintained while 317 power sequence must be maintained while initializing the card.
318 318
319 patternProperties: 319 patternProperties:
320 "^.*@[0-9]+$": 320 "^.*@[0-9]+$":
321 type: object 321 type: object
322 description: | 322 description: |
323 On embedded systems the cards connected 323 On embedded systems the cards connected to a host may need
324 additional properties. These can be spec 324 additional properties. These can be specified in subnodes to the
325 host controller node. The subnodes are i 325 host controller node. The subnodes are identified by the
326 standard \'reg\' property. Which informa 326 standard \'reg\' property. Which information exactly can be
327 specified depends on the bindings for th 327 specified depends on the bindings for the SDIO function driver
328 for the subnode, as specified by the com 328 for the subnode, as specified by the compatible string.
329 329
330 properties: 330 properties:
331 compatible: 331 compatible:
332 description: | 332 description: |
333 Name of SDIO function following gene 333 Name of SDIO function following generic names recommended
334 practice 334 practice
335 335
336 reg: 336 reg:
337 items: 337 items:
338 - minimum: 0 338 - minimum: 0
339 maximum: 7 339 maximum: 7
340 description: 340 description:
341 Must contain the SDIO function n 341 Must contain the SDIO function number of the function this
342 subnode describes. A value of 0 342 subnode describes. A value of 0 denotes the memory SD
343 function, values from 1 to 7 den 343 function, values from 1 to 7 denote the SDIO functions.
344 344
345 required: 345 required:
346 - reg 346 - reg
347 347
348 "^clk-phase-(legacy|sd-hs|mmc-(hs|hs[24]00|d 348 "^clk-phase-(legacy|sd-hs|mmc-(hs|hs[24]00|ddr52)|uhs-(sdr(12|25|50|104)|ddr50))$":
349 $ref: /schemas/types.yaml#/definitions/uin 349 $ref: /schemas/types.yaml#/definitions/uint32-array
350 350
351 minItems: 2 351 minItems: 2
352 maxItems: 2 352 maxItems: 2
353 items: 353 items:
354 minimum: 0 354 minimum: 0
355 maximum: 359 355 maximum: 359
356 description: 356 description:
357 Set the clock (phase) delays which are 357 Set the clock (phase) delays which are to be configured in the
358 controller while switching to particul 358 controller while switching to particular speed mode. These values
359 are in pair of degrees. 359 are in pair of degrees.
360 360
361 dependencies: 361 dependencies:
362 cd-debounce-delay-ms: [ cd-gpios ] 362 cd-debounce-delay-ms: [ cd-gpios ]
363 fixed-emmc-driver-type: [ non-removable ] 363 fixed-emmc-driver-type: [ non-removable ]
364 364
365 additionalProperties: true 365 additionalProperties: true
366 366
367 examples: 367 examples:
368 - | 368 - |
369 mmc3: mmc@1c12000 { 369 mmc3: mmc@1c12000 {
370 #address-cells = <1>; 370 #address-cells = <1>;
371 #size-cells = <0>; 371 #size-cells = <0>;
372 reg = <0x1c12000 0x200>; 372 reg = <0x1c12000 0x200>;
373 pinctrl-names = "default"; 373 pinctrl-names = "default";
374 pinctrl-0 = <&mmc3_pins_a>; 374 pinctrl-0 = <&mmc3_pins_a>;
375 vmmc-supply = <®_vmmc3>; 375 vmmc-supply = <®_vmmc3>;
376 bus-width = <4>; 376 bus-width = <4>;
377 non-removable; 377 non-removable;
378 mmc-pwrseq = <&sdhci0_pwrseq>; 378 mmc-pwrseq = <&sdhci0_pwrseq>;
379 379
380 brcmf: wifi@1 { 380 brcmf: wifi@1 {
381 reg = <1>; 381 reg = <1>;
382 compatible = "brcm,bcm4329-fmac"; 382 compatible = "brcm,bcm4329-fmac";
383 interrupt-parent = <&pio>; 383 interrupt-parent = <&pio>;
384 interrupts = <10 8>; 384 interrupts = <10 8>;
385 interrupt-names = "host-wake"; 385 interrupt-names = "host-wake";
386 }; 386 };
387 }; 387 };
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