1 * STMicroelectronics sdhci-st MMC/SD controlle 1 * STMicroelectronics sdhci-st MMC/SD controller
2 2
3 This file documents the differences between th 3 This file documents the differences between the core properties in
4 Documentation/devicetree/bindings/mmc/mmc.txt 4 Documentation/devicetree/bindings/mmc/mmc.txt and the properties
5 used by the sdhci-st driver. 5 used by the sdhci-st driver.
6 6
7 Required properties: 7 Required properties:
8 - compatible: Must be "st,sdhci" and 8 - compatible: Must be "st,sdhci" and it can be compatible to "st,sdhci-stih407"
9 to set the internal gl 9 to set the internal glue logic used for configuring the MMC
10 subsystem (mmcss) insi 10 subsystem (mmcss) inside the FlashSS (available in STiH407 SoC
11 family). 11 family).
12 12
13 - clock-names: Should be "mmc" and "i 13 - clock-names: Should be "mmc" and "icn". (NB: The latter is not compulsory)
14 See: Documentation/dev 14 See: Documentation/devicetree/bindings/resource-names.txt
15 - clocks: Phandle to the clock. 15 - clocks: Phandle to the clock.
16 See: Documentation/dev 16 See: Documentation/devicetree/bindings/clock/clock-bindings.txt
17 17
18 - interrupts: One mmc interrupt shou 18 - interrupts: One mmc interrupt should be described here.
19 - interrupt-names: Should be "mmcirq". 19 - interrupt-names: Should be "mmcirq".
20 20
21 - pinctrl-names: A pinctrl state names 21 - pinctrl-names: A pinctrl state names "default" must be defined.
22 - pinctrl-0: Phandle referencing pi 22 - pinctrl-0: Phandle referencing pin configuration of the sd/emmc controller.
23 See: Documentation/dev 23 See: Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
24 24
25 - reg: This must provide the 25 - reg: This must provide the host controller base address and it can also
26 contain the FlashSS To 26 contain the FlashSS Top register for TX/RX delay used by the driver
27 to configure DLL insid 27 to configure DLL inside the flashSS, if so reg-names must also be
28 specified. 28 specified.
29 29
30 Optional properties: 30 Optional properties:
31 - reg-names: Should be "mmc" and "t 31 - reg-names: Should be "mmc" and "top-mmc-delay". "top-mmc-delay" is optional
32 for eMMC on stih407 fa 32 for eMMC on stih407 family silicon to configure DLL inside FlashSS.
33 33
34 - non-removable: Non-removable slot. Al 34 - non-removable: Non-removable slot. Also used for configuring mmcss in STiH407 SoC
35 family. 35 family.
36 See: Documentation/de 36 See: Documentation/devicetree/bindings/mmc/mmc.txt.
37 37
38 - bus-width: Number of data lines. 38 - bus-width: Number of data lines.
39 See: Documentation/de 39 See: Documentation/devicetree/bindings/mmc/mmc.txt.
40 40
41 - max-frequency: Can be 200MHz, 100MHz 41 - max-frequency: Can be 200MHz, 100MHz or 50MHz (default) and used for
42 configuring the CCONFI 42 configuring the CCONFIG3 in the mmcss.
43 See: Documentation/de 43 See: Documentation/devicetree/bindings/mmc/mmc.txt.
44 44
45 - resets: Phandle and reset spec 45 - resets: Phandle and reset specifier pair to softreset line of HC IP.
46 See: Documentation/dev 46 See: Documentation/devicetree/bindings/reset/reset.txt
47 47
48 - vqmmc-supply: Phandle to the regulat 48 - vqmmc-supply: Phandle to the regulator dt node, mentioned as the vcc/vdd
49 supply in eMMC/SD spec 49 supply in eMMC/SD specs.
50 50
51 - sd-uhs-sdr50: To enable the SDR50 in the mmc 51 - sd-uhs-sdr50: To enable the SDR50 in the mmcss.
52 See: Documentation/de 52 See: Documentation/devicetree/bindings/mmc/mmc.txt.
53 53
54 - sd-uhs-sdr104: To enable the SDR104 i 54 - sd-uhs-sdr104: To enable the SDR104 in the mmcss.
55 See: Documentation/de 55 See: Documentation/devicetree/bindings/mmc/mmc.txt.
56 56
57 - sd-uhs-ddr50: To enable the DDR50 in 57 - sd-uhs-ddr50: To enable the DDR50 in the mmcss.
58 See: Documentation/de 58 See: Documentation/devicetree/bindings/mmc/mmc.txt.
59 59
60 Example: 60 Example:
61 61
62 /* Example stih416e eMMC configuration */ 62 /* Example stih416e eMMC configuration */
63 63
64 mmc0: sdhci@fe81e000 { 64 mmc0: sdhci@fe81e000 {
65 compatible = "st,sdhci"; 65 compatible = "st,sdhci";
66 reg = <0xfe81e000 0x1000>; 66 reg = <0xfe81e000 0x1000>;
67 interrupts = <GIC_SPI 127 IRQ_TYP 67 interrupts = <GIC_SPI 127 IRQ_TYPE_NONE>;
68 interrupt-names = "mmcirq"; 68 interrupt-names = "mmcirq";
69 pinctrl-names = "default"; 69 pinctrl-names = "default";
70 pinctrl-0 = <&pinctrl_mmc0>; 70 pinctrl-0 = <&pinctrl_mmc0>;
71 clock-names = "mmc"; 71 clock-names = "mmc";
72 clocks = <&clk_s_a1_ls 1>; 72 clocks = <&clk_s_a1_ls 1>;
73 bus-width = <8> 73 bus-width = <8>
74 74
75 /* Example SD stih407 family configuration */ 75 /* Example SD stih407 family configuration */
76 76
77 mmc1: sdhci@9080000 { 77 mmc1: sdhci@9080000 {
78 compatible = "st,sdhci-stih407", 78 compatible = "st,sdhci-stih407", "st,sdhci";
79 reg = <0x09080000 0x7ff>; 79 reg = <0x09080000 0x7ff>;
80 reg-names = "mmc"; 80 reg-names = "mmc";
81 interrupts = <GIC_SPI 90 IRQ_TYPE 81 interrupts = <GIC_SPI 90 IRQ_TYPE_NONE>;
82 interrupt-names = "mmcirq"; 82 interrupt-names = "mmcirq";
83 pinctrl-names = "default"; 83 pinctrl-names = "default";
84 pinctrl-0 = <&pinctrl_sd1>; 84 pinctrl-0 = <&pinctrl_sd1>;
85 clock-names = "mmc"; 85 clock-names = "mmc";
86 clocks = <&clk_s_c0_flexgen C 86 clocks = <&clk_s_c0_flexgen CLK_MMC_1>;
87 resets = <&softreset STIH407_ 87 resets = <&softreset STIH407_MMC1_SOFTRESET>;
88 bus-width = <4>; 88 bus-width = <4>;
89 }; 89 };
90 90
91 /* Example eMMC stih407 family configuration * 91 /* Example eMMC stih407 family configuration */
92 92
93 mmc0: sdhci@9060000 { 93 mmc0: sdhci@9060000 {
94 compatible = "st,sdhci-stih407", 94 compatible = "st,sdhci-stih407", "st,sdhci";
95 reg = <0x09060000 0x7ff>, 95 reg = <0x09060000 0x7ff>, <0x9061008 0x20>;
96 reg-names = "mmc", "top-mmc-dela 96 reg-names = "mmc", "top-mmc-delay";
97 interrupts = <GIC_SPI 92 IRQ_TYPE 97 interrupts = <GIC_SPI 92 IRQ_TYPE_NONE>;
98 interrupt-names = "mmcirq"; 98 interrupt-names = "mmcirq";
99 pinctrl-names = "default"; 99 pinctrl-names = "default";
100 pinctrl-0 = <&pinctrl_mmc0>; 100 pinctrl-0 = <&pinctrl_mmc0>;
101 clock-names = "mmc"; 101 clock-names = "mmc";
102 clocks = <&clk_s_c0_flexgen C 102 clocks = <&clk_s_c0_flexgen CLK_MMC_0>;
103 vqmmc-supply = <&vmmc_reg>; 103 vqmmc-supply = <&vmmc_reg>;
104 max-frequency = <200000000>; 104 max-frequency = <200000000>;
105 bus-width = <8>; 105 bus-width = <8>;
106 non-removable; 106 non-removable;
107 sd-uhs-sdr50; 107 sd-uhs-sdr50;
108 sd-uhs-sdr104; 108 sd-uhs-sdr104;
109 sd-uhs-ddr50; 109 sd-uhs-ddr50;
110 }; 110 };
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