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Linux/Documentation/devicetree/bindings/mtd/atmel-nand.txt

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Diff markup

Differences between /Documentation/devicetree/bindings/mtd/atmel-nand.txt (Version linux-6.12-rc7) and /Documentation/devicetree/bindings/mtd/atmel-nand.txt (Version linux-3.10.108)


  1 Atmel NAND flash controller bindings           !!   1 Atmel NAND flash
  2                                                << 
  3 The NAND flash controller node should be defin << 
  4 Documentation/devicetree/bindings/memory-contr << 
  5 One or several NAND devices can be defined und << 
  6 The NAND controller might be connected to an E << 
  7                                                << 
  8 * NAND controller bindings:                    << 
  9                                                << 
 10 Required properties:                           << 
 11 - compatible: should be one of the following   << 
 12         "atmel,at91rm9200-nand-controller"     << 
 13         "atmel,at91sam9260-nand-controller"    << 
 14         "atmel,at91sam9261-nand-controller"    << 
 15         "atmel,at91sam9g45-nand-controller"    << 
 16         "atmel,sama5d3-nand-controller"        << 
 17         "microchip,sam9x60-nand-controller"    << 
 18 - ranges: empty ranges property to forward EBI << 
 19 - #address-cells: should be set to 2.          << 
 20 - #size-cells: should be set to 1.             << 
 21 - atmel,nfc-io: phandle to the NFC IO block. O << 
 22                 controllers.                   << 
 23 - atmel,nfc-sram: phandle to the NFC SRAM bloc << 
 24                   controllers.                 << 
 25                                                << 
 26 Optional properties:                           << 
 27 - ecc-engine: phandle to the PMECC block. Only << 
 28               a PMECC engine.                  << 
 29                                                << 
 30 * NAND device/chip bindings:                   << 
 31                                                << 
 32 Required properties:                           << 
 33 - reg: describes the CS lines assigned to the  << 
 34        exposes multiple CS lines (multi-dies c << 
 35        contain X tuples of 3 entries.          << 
 36        1st entry: the CS line this NAND chip i << 
 37        2nd entry: the base offset of the memor << 
 38                   device (always 0)            << 
 39        3rd entry: the memory region size (alwa << 
 40                                                << 
 41 Optional properties:                           << 
 42 - rb-gpios: the GPIO(s) used to check the Read << 
 43 - cs-gpios: the GPIO(s) used to control the CS << 
 44 - det-gpios: the GPIO used to detect if a Smar << 
 45 - atmel,rb: an integer identifying the native  << 
 46             on sama5 SoCs.                     << 
 47                                                << 
 48 All generic properties are described in the ge << 
 49 Documentation/devicetree/bindings/mtd/.        << 
 50                                                << 
 51 * ECC engine (PMECC) bindings:                 << 
 52                                                << 
 53 Required properties:                           << 
 54 - compatible: should be one of the following   << 
 55         "atmel,at91sam9g45-pmecc"              << 
 56         "atmel,sama5d4-pmecc"                  << 
 57         "atmel,sama5d2-pmecc"                  << 
 58         "microchip,sam9x60-pmecc"              << 
 59         "microchip,sam9x7-pmecc", "atmel,at91s << 
 60 - reg: should contain 2 register ranges. The f << 
 61        block, and the second one to the PMECC_ << 
 62                                                << 
 63 Example:                                       << 
 64                                                << 
 65         nfc_io: nfc-io@70000000 {              << 
 66                 compatible = "atmel,sama5d3-nf << 
 67                 reg = <0x70000000 0x8000000>;  << 
 68         };                                     << 
 69                                                << 
 70         pmecc: ecc-engine@ffffc070 {           << 
 71                 compatible = "atmel,at91sam9g4 << 
 72                 reg = <0xffffc070 0x490>,      << 
 73                       <0xffffc500 0x100>;      << 
 74         };                                     << 
 75                                                << 
 76         ebi: ebi@10000000 {                    << 
 77                 compatible = "atmel,sama5d3-eb << 
 78                 #address-cells = <2>;          << 
 79                 #size-cells = <1>;             << 
 80                 atmel,smc = <&hsmc>;           << 
 81                 reg = <0x10000000 0x10000000   << 
 82                        0x40000000 0x30000000>; << 
 83                 ranges = <0x0 0x0 0x10000000 0 << 
 84                           0x1 0x0 0x40000000 0 << 
 85                           0x2 0x0 0x50000000 0 << 
 86                           0x3 0x0 0x60000000 0 << 
 87                 clocks = <&mck>;               << 
 88                                                << 
 89                 nand_controller: nand-controll << 
 90                         compatible = "atmel,sa << 
 91                         atmel,nfc-sram = <&nfc << 
 92                         atmel,nfc-io = <&nfc_i << 
 93                         ecc-engine = <&pmecc>; << 
 94                         #address-cells = <2>;  << 
 95                         #size-cells = <1>;     << 
 96                         ranges;                << 
 97                                                << 
 98                         nand@3 {               << 
 99                                 reg = <0x3 0x0 << 
100                                 atmel,rb = <0> << 
101                                                << 
102                                 /*             << 
103                                  * Put generic << 
104                                  * subnodes he << 
105                                  */            << 
106                         };                     << 
107                 };                             << 
108         };                                     << 
109                                                << 
110 ---------------------------------------------- << 
111                                                << 
112 Deprecated bindings (should not be used in new << 
113                                                     2 
114 Required properties:                                3 Required properties:
115 - compatible: The possible values are:         !!   4 - compatible : "atmel,at91rm9200-nand".
116         "atmel,at91rm9200-nand"                << 
117         "atmel,sama5d2-nand"                   << 
118         "atmel,sama5d4-nand"                   << 
119 - reg : should specify localbus address and si      5 - reg : should specify localbus address and size used for the chip,
120         and hardware ECC controller if availab      6         and hardware ECC controller if available.
121         If the hardware ECC is PMECC, it shoul      7         If the hardware ECC is PMECC, it should contain address and size for
122         PMECC and PMECC Error Location control !!   8         PMECC, PMECC Error Location controller and ROM which has lookup tables.
123         The PMECC lookup table address and siz << 
124         specified, driver will build it in run << 
125 - atmel,nand-addr-offset : offset for the addr      9 - atmel,nand-addr-offset : offset for the address latch.
126 - atmel,nand-cmd-offset : offset for the comma     10 - atmel,nand-cmd-offset : offset for the command latch.
127 - #address-cells, #size-cells : Must be presen     11 - #address-cells, #size-cells : Must be present if the device has sub-nodes
128   representing partitions.                         12   representing partitions.
129                                                    13 
130 - gpios : specifies the gpio pins to control t     14 - gpios : specifies the gpio pins to control the NAND device. detect is an
131   optional gpio and may be set to 0 if not pre     15   optional gpio and may be set to 0 if not present.
132                                                    16 
133 Optional properties:                               17 Optional properties:
134 - atmel,nand-has-dma : boolean to support dma  << 
135 - nand-ecc-mode : String, operation mode of th     18 - nand-ecc-mode : String, operation mode of the NAND ecc mode, soft by default.
136   Supported values are: "none", "soft", "hw",      19   Supported values are: "none", "soft", "hw", "hw_syndrome", "hw_oob_first",
137   "soft_bch".                                      20   "soft_bch".
138 - atmel,has-pmecc : boolean to enable Programm !!  21 - atmel,has-pmecc : boolean to enable Programmable Multibit ECC hardware.
139   capable of BCH encoding and decoding, on dev !!  22   Only supported by at91sam9x5 or later sam9 product.
140 - atmel,pmecc-cap : error correct capability f     23 - atmel,pmecc-cap : error correct capability for Programmable Multibit ECC
141   Controller. Supported values are: 2, 4, 8, 1 !!  24   Controller. Supported values are: 2, 4, 8, 12, 24.
142   is "atmel,sama5d2-nand", 32 is also valid.   << 
143 - atmel,pmecc-sector-size : sector size for EC     25 - atmel,pmecc-sector-size : sector size for ECC computation. Supported values
144   are: 512, 1024.                                  26   are: 512, 1024.
145 - atmel,pmecc-lookup-table-offset : includes t     27 - atmel,pmecc-lookup-table-offset : includes two offsets of lookup table in ROM
146   for different sector size. First one is for      28   for different sector size. First one is for sector size 512, the next is for
147   sector size 1024. If not specified, driver w !!  29   sector size 1024.
148 - nand-bus-width : 8 or 16 bus width if not pr     30 - nand-bus-width : 8 or 16 bus width if not present 8
149 - nand-on-flash-bbt: boolean to enable on flas     31 - nand-on-flash-bbt: boolean to enable on flash bbt option if not present false
150                                                    32 
151 Nand Flash Controller(NFC) is an optional sub- << 
152 Required properties:                           << 
153 - compatible : "atmel,sama5d3-nfc".            << 
154 - reg : should specify the address and size us << 
155         NFC registers and NFC SRAM. NFC SRAM a << 
156         if don't want to use it.               << 
157 - clocks: phandle to the peripheral clock      << 
158 Optional properties:                           << 
159 - atmel,write-by-sram: boolean to enable NFC w << 
160                                                << 
161 Examples:                                          33 Examples:
162 nand0: nand@40000000,0 {                           34 nand0: nand@40000000,0 {
163         compatible = "atmel,at91rm9200-nand";      35         compatible = "atmel,at91rm9200-nand";
164         #address-cells = <1>;                      36         #address-cells = <1>;
165         #size-cells = <1>;                         37         #size-cells = <1>;
166         reg = <0x40000000 0x10000000               38         reg = <0x40000000 0x10000000
167                0xffffe800 0x200                    39                0xffffe800 0x200
168               >;                                   40               >;
169         atmel,nand-addr-offset = <21>;  /* ale     41         atmel,nand-addr-offset = <21>;  /* ale */
170         atmel,nand-cmd-offset = <22>;   /* cle     42         atmel,nand-cmd-offset = <22>;   /* cle */
171         nand-on-flash-bbt;                         43         nand-on-flash-bbt;
172         nand-ecc-mode = "soft";                    44         nand-ecc-mode = "soft";
173         gpios = <&pioC 13 0     /* rdy */          45         gpios = <&pioC 13 0     /* rdy */
174                  &pioC 14 0     /* nce */          46                  &pioC 14 0     /* nce */
175                  0              /* cd */           47                  0              /* cd */
176                 >;                                 48                 >;
177         partition@0 {                              49         partition@0 {
178                 ...                                50                 ...
179         };                                         51         };
180 };                                                 52 };
181                                                    53 
182 /* for PMECC supported chips */                    54 /* for PMECC supported chips */
183 nand0: nand@40000000 {                             55 nand0: nand@40000000 {
184         compatible = "atmel,at91rm9200-nand";      56         compatible = "atmel,at91rm9200-nand";
185         #address-cells = <1>;                      57         #address-cells = <1>;
186         #size-cells = <1>;                         58         #size-cells = <1>;
187         reg = < 0x40000000 0x10000000   /* bus     59         reg = < 0x40000000 0x10000000   /* bus addr & size */
188                 0xffffe000 0x00000600   /* PME     60                 0xffffe000 0x00000600   /* PMECC addr & size */
189                 0xffffe600 0x00000200   /* PME     61                 0xffffe600 0x00000200   /* PMECC ERRLOC addr & size */
190                 0x00100000 0x00100000   /* ROM     62                 0x00100000 0x00100000   /* ROM addr & size */
191                 >;                                 63                 >;
192         atmel,nand-addr-offset = <21>;  /* ale     64         atmel,nand-addr-offset = <21>;  /* ale */
193         atmel,nand-cmd-offset = <22>;   /* cle     65         atmel,nand-cmd-offset = <22>;   /* cle */
194         nand-on-flash-bbt;                         66         nand-on-flash-bbt;
195         nand-ecc-mode = "hw";                      67         nand-ecc-mode = "hw";
196         atmel,has-pmecc;        /* enable PMEC     68         atmel,has-pmecc;        /* enable PMECC */
197         atmel,pmecc-cap = <2>;                     69         atmel,pmecc-cap = <2>;
198         atmel,pmecc-sector-size = <512>;           70         atmel,pmecc-sector-size = <512>;
199         atmel,pmecc-lookup-table-offset = <0x8     71         atmel,pmecc-lookup-table-offset = <0x8000 0x10000>;
200         gpios = <&pioD 5 0      /* rdy */          72         gpios = <&pioD 5 0      /* rdy */
201                  &pioD 4 0      /* nce */          73                  &pioD 4 0      /* nce */
202                  0              /* cd */           74                  0              /* cd */
203                 >;                                 75                 >;
204         partition@0 {                              76         partition@0 {
205                 ...                                77                 ...
206         };                                     << 
207 };                                             << 
208                                                << 
209 /* for NFC supported chips */                  << 
210 nand0: nand@40000000 {                         << 
211         compatible = "atmel,at91rm9200-nand";  << 
212         #address-cells = <1>;                  << 
213         #size-cells = <1>;                     << 
214         ranges;                                << 
215         ...                                    << 
216         nfc@70000000 {                         << 
217                 compatible = "atmel,sama5d3-nf << 
218                 #address-cells = <1>;          << 
219                 #size-cells = <1>;             << 
220                 clocks = <&hsmc_clk>           << 
221                 reg = <                        << 
222                         0x70000000 0x10000000  << 
223                         0xffffc000 0x00000070  << 
224                         0x00200000 0x00100000  << 
225                 >;                             << 
226         };                                         78         };
227 };                                                 79 };
                                                      

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