1 # SPDX-License-Identifier: (GPL-2.0-only OR BS 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/mtd/st,stm3 4 $id: http://devicetree.org/schemas/mtd/st,stm32-fmc2-nand.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: STMicroelectronics Flexible Memory Cont 7 title: STMicroelectronics Flexible Memory Controller 2 (FMC2)
8 8
9 maintainers: 9 maintainers:
10 - Christophe Kerello <christophe.kerello@foss 10 - Christophe Kerello <christophe.kerello@foss.st.com>
11 11
12 properties: 12 properties:
13 compatible: 13 compatible:
14 enum: 14 enum:
15 - st,stm32mp15-fmc2 15 - st,stm32mp15-fmc2
16 - st,stm32mp1-fmc2-nfc 16 - st,stm32mp1-fmc2-nfc
17 - st,stm32mp25-fmc2-nfc 17 - st,stm32mp25-fmc2-nfc
18 18
19 reg: 19 reg:
20 minItems: 6 20 minItems: 6
21 maxItems: 12 21 maxItems: 12
22 22
23 interrupts: 23 interrupts:
24 maxItems: 1 24 maxItems: 1
25 25
26 dmas: 26 dmas:
27 items: 27 items:
28 - description: tx DMA channel 28 - description: tx DMA channel
29 - description: rx DMA channel 29 - description: rx DMA channel
30 - description: ecc DMA channel 30 - description: ecc DMA channel
31 31
32 dma-names: 32 dma-names:
33 items: 33 items:
34 - const: tx 34 - const: tx
35 - const: rx 35 - const: rx
36 - const: ecc 36 - const: ecc
37 37
38 patternProperties: 38 patternProperties:
39 "^nand@[a-f0-9]$": 39 "^nand@[a-f0-9]$":
40 type: object 40 type: object
41 $ref: raw-nand-chip.yaml 41 $ref: raw-nand-chip.yaml
42 properties: 42 properties:
43 nand-ecc-step-size: 43 nand-ecc-step-size:
44 const: 512 44 const: 512
45 45
46 nand-ecc-strength: 46 nand-ecc-strength:
47 enum: [1, 4, 8] 47 enum: [1, 4, 8]
48 48
49 unevaluatedProperties: false 49 unevaluatedProperties: false
50 50
51 allOf: 51 allOf:
52 - $ref: nand-controller.yaml# 52 - $ref: nand-controller.yaml#
53 53
54 - if: 54 - if:
55 properties: 55 properties:
56 compatible: 56 compatible:
57 contains: 57 contains:
58 const: st,stm32mp15-fmc2 58 const: st,stm32mp15-fmc2
59 then: 59 then:
60 properties: 60 properties:
61 reg: 61 reg:
62 items: 62 items:
63 - description: Registers 63 - description: Registers
64 - description: Chip select 0 data 64 - description: Chip select 0 data
65 - description: Chip select 0 comma 65 - description: Chip select 0 command
66 - description: Chip select 0 addre 66 - description: Chip select 0 address space
67 - description: Chip select 1 data 67 - description: Chip select 1 data
68 - description: Chip select 1 comma 68 - description: Chip select 1 command
69 - description: Chip select 1 addre 69 - description: Chip select 1 address space
70 70
71 clocks: 71 clocks:
72 maxItems: 1 72 maxItems: 1
73 73
74 resets: 74 resets:
75 maxItems: 1 75 maxItems: 1
76 76
77 required: 77 required:
78 - clocks 78 - clocks
79 79
80 - if: 80 - if:
81 properties: 81 properties:
82 compatible: 82 compatible:
83 contains: 83 contains:
84 const: st,stm32mp1-fmc2-nfc 84 const: st,stm32mp1-fmc2-nfc
85 then: 85 then:
86 properties: 86 properties:
87 reg: 87 reg:
88 items: 88 items:
89 - description: Chip select 0 data 89 - description: Chip select 0 data
90 - description: Chip select 0 comma 90 - description: Chip select 0 command
91 - description: Chip select 0 addre 91 - description: Chip select 0 address space
92 - description: Chip select 1 data 92 - description: Chip select 1 data
93 - description: Chip select 1 comma 93 - description: Chip select 1 command
94 - description: Chip select 1 addre 94 - description: Chip select 1 address space
95 95
96 - if: 96 - if:
97 properties: 97 properties:
98 compatible: 98 compatible:
99 contains: 99 contains:
100 const: st,stm32mp25-fmc2-nfc 100 const: st,stm32mp25-fmc2-nfc
101 then: 101 then:
102 properties: 102 properties:
103 reg: 103 reg:
104 items: 104 items:
105 - description: Chip select 0 data 105 - description: Chip select 0 data
106 - description: Chip select 0 comma 106 - description: Chip select 0 command
107 - description: Chip select 0 addre 107 - description: Chip select 0 address space
108 - description: Chip select 1 data 108 - description: Chip select 1 data
109 - description: Chip select 1 comma 109 - description: Chip select 1 command
110 - description: Chip select 1 addre 110 - description: Chip select 1 address space
111 - description: Chip select 2 data 111 - description: Chip select 2 data
112 - description: Chip select 2 comma 112 - description: Chip select 2 command
113 - description: Chip select 2 addre 113 - description: Chip select 2 address space
114 - description: Chip select 3 data 114 - description: Chip select 3 data
115 - description: Chip select 3 comma 115 - description: Chip select 3 command
116 - description: Chip select 3 addre 116 - description: Chip select 3 address space
117 117
118 required: 118 required:
119 - compatible 119 - compatible
120 - reg 120 - reg
121 - interrupts 121 - interrupts
122 122
123 unevaluatedProperties: false 123 unevaluatedProperties: false
124 124
125 examples: 125 examples:
126 - | 126 - |
127 #include <dt-bindings/interrupt-controller 127 #include <dt-bindings/interrupt-controller/arm-gic.h>
128 #include <dt-bindings/clock/stm32mp1-clks. 128 #include <dt-bindings/clock/stm32mp1-clks.h>
129 #include <dt-bindings/reset/stm32mp1-reset 129 #include <dt-bindings/reset/stm32mp1-resets.h>
130 130
131 nand-controller@58002000 { 131 nand-controller@58002000 {
132 compatible = "st,stm32mp15-fmc2"; 132 compatible = "st,stm32mp15-fmc2";
133 reg = <0x58002000 0x1000>, 133 reg = <0x58002000 0x1000>,
134 <0x80000000 0x1000>, 134 <0x80000000 0x1000>,
135 <0x88010000 0x1000>, 135 <0x88010000 0x1000>,
136 <0x88020000 0x1000>, 136 <0x88020000 0x1000>,
137 <0x81000000 0x1000>, 137 <0x81000000 0x1000>,
138 <0x89010000 0x1000>, 138 <0x89010000 0x1000>,
139 <0x89020000 0x1000>; 139 <0x89020000 0x1000>;
140 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVE 140 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
141 dmas = <&mdma1 20 0x2 0x12000a02 0x0 0 141 dmas = <&mdma1 20 0x2 0x12000a02 0x0 0x0>,
142 <&mdma1 20 0x2 0x12000a08 0x0 0 142 <&mdma1 20 0x2 0x12000a08 0x0 0x0>,
143 <&mdma1 21 0x2 0x12000a0a 0x0 0 143 <&mdma1 21 0x2 0x12000a0a 0x0 0x0>;
144 dma-names = "tx", "rx", "ecc"; 144 dma-names = "tx", "rx", "ecc";
145 clocks = <&rcc FMC_K>; 145 clocks = <&rcc FMC_K>;
146 resets = <&rcc FMC_R>; 146 resets = <&rcc FMC_R>;
147 #address-cells = <1>; 147 #address-cells = <1>;
148 #size-cells = <0>; 148 #size-cells = <0>;
149 149
150 nand@0 { 150 nand@0 {
151 reg = <0>; 151 reg = <0>;
152 nand-on-flash-bbt; 152 nand-on-flash-bbt;
153 #address-cells = <1>; 153 #address-cells = <1>;
154 #size-cells = <1>; 154 #size-cells = <1>;
155 }; 155 };
156 }; 156 };
157 157
158 ... 158 ...
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