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Linux/Documentation/devicetree/bindings/net/ethernet-phy.yaml

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Diff markup

Differences between /Documentation/devicetree/bindings/net/ethernet-phy.yaml (Version linux-6.12-rc7) and /Documentation/devicetree/bindings/net/ethernet-phy.yaml (Version linux-6.8.12)


  1 # SPDX-License-Identifier: GPL-2.0                  1 # SPDX-License-Identifier: GPL-2.0
  2 %YAML 1.2                                           2 %YAML 1.2
  3 ---                                                 3 ---
  4 $id: http://devicetree.org/schemas/net/etherne      4 $id: http://devicetree.org/schemas/net/ethernet-phy.yaml#
  5 $schema: http://devicetree.org/meta-schemas/co      5 $schema: http://devicetree.org/meta-schemas/core.yaml#
  6                                                     6 
  7 title: Ethernet PHY Common Properties               7 title: Ethernet PHY Common Properties
  8                                                     8 
  9 maintainers:                                        9 maintainers:
 10   - Andrew Lunn <andrew@lunn.ch>                    10   - Andrew Lunn <andrew@lunn.ch>
 11   - Florian Fainelli <f.fainelli@gmail.com>         11   - Florian Fainelli <f.fainelli@gmail.com>
 12   - Heiner Kallweit <hkallweit1@gmail.com>          12   - Heiner Kallweit <hkallweit1@gmail.com>
 13                                                    13 
 14 # The dt-schema tools will generate a select s     14 # The dt-schema tools will generate a select statement first by using
 15 # the compatible, and second by using the node     15 # the compatible, and second by using the node name if any. In our
 16 # case, the node name is the one we want to ma     16 # case, the node name is the one we want to match on, while the
 17 # compatible is optional.                          17 # compatible is optional.
 18 select:                                            18 select:
 19   properties:                                      19   properties:
 20     $nodename:                                     20     $nodename:
 21       pattern: "^ethernet-phy(@[a-f0-9]+)?$"       21       pattern: "^ethernet-phy(@[a-f0-9]+)?$"
 22                                                    22 
 23   required:                                        23   required:
 24     - $nodename                                    24     - $nodename
 25                                                    25 
 26 properties:                                        26 properties:
 27   $nodename:                                       27   $nodename:
 28     pattern: "^ethernet-phy(@[a-f0-9]+)?$"         28     pattern: "^ethernet-phy(@[a-f0-9]+)?$"
 29                                                    29 
 30   compatible:                                      30   compatible:
 31     oneOf:                                         31     oneOf:
 32       - const: ethernet-phy-ieee802.3-c22          32       - const: ethernet-phy-ieee802.3-c22
 33         description: PHYs that implement IEEE8     33         description: PHYs that implement IEEE802.3 clause 22
 34       - const: ethernet-phy-ieee802.3-c45          34       - const: ethernet-phy-ieee802.3-c45
 35         description: PHYs that implement IEEE8     35         description: PHYs that implement IEEE802.3 clause 45
 36       - pattern: "^ethernet-phy-id[a-f0-9]{4}\     36       - pattern: "^ethernet-phy-id[a-f0-9]{4}\\.[a-f0-9]{4}$"
 37         description:                               37         description:
 38           If the PHY reports an incorrect ID (     38           If the PHY reports an incorrect ID (or none at all) then the
 39           compatible list may contain an entry     39           compatible list may contain an entry with the correct PHY ID
 40           in the above form.                       40           in the above form.
 41           The first group of digits is the 16      41           The first group of digits is the 16 bit Phy Identifier 1
 42           register, this is the chip vendor OU     42           register, this is the chip vendor OUI bits 3:18. The
 43           second group of digits is the Phy Id     43           second group of digits is the Phy Identifier 2 register,
 44           this is the chip vendor OUI bits 19:     44           this is the chip vendor OUI bits 19:24, followed by 10
 45           bits of a vendor specific ID.            45           bits of a vendor specific ID.
 46       - items:                                     46       - items:
 47           - pattern: "^ethernet-phy-id[a-f0-9]     47           - pattern: "^ethernet-phy-id[a-f0-9]{4}\\.[a-f0-9]{4}$"
 48           - const: ethernet-phy-ieee802.3-c22      48           - const: ethernet-phy-ieee802.3-c22
 49       - items:                                     49       - items:
 50           - pattern: "^ethernet-phy-id[a-f0-9]     50           - pattern: "^ethernet-phy-id[a-f0-9]{4}\\.[a-f0-9]{4}$"
 51           - const: ethernet-phy-ieee802.3-c45      51           - const: ethernet-phy-ieee802.3-c45
 52                                                    52 
 53   reg:                                             53   reg:
 54     minimum: 0                                     54     minimum: 0
 55     maximum: 31                                    55     maximum: 31
 56     description:                                   56     description:
 57       The ID number for the PHY.                   57       The ID number for the PHY.
 58                                                    58 
 59   interrupts:                                      59   interrupts:
 60     maxItems: 1                                    60     maxItems: 1
 61                                                    61 
 62   max-speed:                                       62   max-speed:
 63     enum:                                          63     enum:
 64       - 10                                         64       - 10
 65       - 100                                        65       - 100
 66       - 1000                                       66       - 1000
 67       - 2500                                       67       - 2500
 68       - 5000                                       68       - 5000
 69       - 10000                                      69       - 10000
 70       - 20000                                      70       - 20000
 71       - 25000                                      71       - 25000
 72       - 40000                                      72       - 40000
 73       - 50000                                      73       - 50000
 74       - 56000                                      74       - 56000
 75       - 100000                                     75       - 100000
 76       - 200000                                     76       - 200000
 77     description:                                   77     description:
 78       Maximum PHY supported speed in Mbits / s     78       Maximum PHY supported speed in Mbits / seconds.
 79                                                    79 
 80   phy-10base-t1l-2.4vpp:                           80   phy-10base-t1l-2.4vpp:
 81     description: |                                 81     description: |
 82       tristate, request/disable 2.4 Vpp operat     82       tristate, request/disable 2.4 Vpp operating mode. The values are:
 83       0: Disable 2.4 Vpp operating mode.           83       0: Disable 2.4 Vpp operating mode.
 84       1: Request 2.4 Vpp operating mode from l     84       1: Request 2.4 Vpp operating mode from link partner.
 85       Absence of this property will leave conf     85       Absence of this property will leave configuration to default values.
 86     $ref: /schemas/types.yaml#/definitions/uin     86     $ref: /schemas/types.yaml#/definitions/uint32
 87     enum: [0, 1]                                   87     enum: [0, 1]
 88                                                    88 
 89   broken-turn-around:                              89   broken-turn-around:
 90     $ref: /schemas/types.yaml#/definitions/fla     90     $ref: /schemas/types.yaml#/definitions/flag
 91     description:                                   91     description:
 92       If set, indicates the PHY device does no     92       If set, indicates the PHY device does not correctly release
 93       the turn around line low at end of the c     93       the turn around line low at end of the control phase of the
 94       MDIO transaction.                            94       MDIO transaction.
 95                                                    95 
 96   brr-mode:                                    << 
 97     $ref: /schemas/types.yaml#/definitions/fla << 
 98     description:                               << 
 99       If set, indicates the network cable inte << 
100       defined in the BroadR-Reach link mode sp << 
101       1BR-10 names. The PHY must be configured << 
102       by software.                             << 
103                                                << 
104   clocks:                                          96   clocks:
105     maxItems: 1                                    97     maxItems: 1
106     description:                                   98     description:
107       External clock connected to the PHY. If      99       External clock connected to the PHY. If not specified it is assumed
108       that the PHY uses a fixed crystal or an     100       that the PHY uses a fixed crystal or an internal oscillator.
109                                                   101 
110   enet-phy-lane-swap:                             102   enet-phy-lane-swap:
111     $ref: /schemas/types.yaml#/definitions/fla    103     $ref: /schemas/types.yaml#/definitions/flag
112     description:                                  104     description:
113       If set, indicates the PHY will swap the     105       If set, indicates the PHY will swap the TX/RX lanes to
114       compensate for the board being designed     106       compensate for the board being designed with the lanes
115       swapped.                                    107       swapped.
116                                                   108 
117   enet-phy-lane-no-swap:                          109   enet-phy-lane-no-swap:
118     $ref: /schemas/types.yaml#/definitions/fla    110     $ref: /schemas/types.yaml#/definitions/flag
119     description:                                  111     description:
120       If set, indicates that PHY will disable     112       If set, indicates that PHY will disable swap of the
121       TX/RX lanes. This property allows the PH    113       TX/RX lanes. This property allows the PHY to work correctly after
122       e.g. wrong bootstrap configuration cause    114       e.g. wrong bootstrap configuration caused by issues in PCB
123       layout design.                              115       layout design.
124                                                   116 
125   eee-broken-100tx:                               117   eee-broken-100tx:
126     $ref: /schemas/types.yaml#/definitions/fla    118     $ref: /schemas/types.yaml#/definitions/flag
127     description:                                  119     description:
128       Mark the corresponding energy efficient     120       Mark the corresponding energy efficient ethernet mode as
129       broken and request the ethernet to stop     121       broken and request the ethernet to stop advertising it.
130                                                   122 
131   eee-broken-1000t:                               123   eee-broken-1000t:
132     $ref: /schemas/types.yaml#/definitions/fla    124     $ref: /schemas/types.yaml#/definitions/flag
133     description:                                  125     description:
134       Mark the corresponding energy efficient     126       Mark the corresponding energy efficient ethernet mode as
135       broken and request the ethernet to stop     127       broken and request the ethernet to stop advertising it.
136                                                   128 
137   eee-broken-10gt:                                129   eee-broken-10gt:
138     $ref: /schemas/types.yaml#/definitions/fla    130     $ref: /schemas/types.yaml#/definitions/flag
139     description:                                  131     description:
140       Mark the corresponding energy efficient     132       Mark the corresponding energy efficient ethernet mode as
141       broken and request the ethernet to stop     133       broken and request the ethernet to stop advertising it.
142                                                   134 
143   eee-broken-1000kx:                              135   eee-broken-1000kx:
144     $ref: /schemas/types.yaml#/definitions/fla    136     $ref: /schemas/types.yaml#/definitions/flag
145     description:                                  137     description:
146       Mark the corresponding energy efficient     138       Mark the corresponding energy efficient ethernet mode as
147       broken and request the ethernet to stop     139       broken and request the ethernet to stop advertising it.
148                                                   140 
149   eee-broken-10gkx4:                              141   eee-broken-10gkx4:
150     $ref: /schemas/types.yaml#/definitions/fla    142     $ref: /schemas/types.yaml#/definitions/flag
151     description:                                  143     description:
152       Mark the corresponding energy efficient     144       Mark the corresponding energy efficient ethernet mode as
153       broken and request the ethernet to stop     145       broken and request the ethernet to stop advertising it.
154                                                   146 
155   eee-broken-10gkr:                               147   eee-broken-10gkr:
156     $ref: /schemas/types.yaml#/definitions/fla    148     $ref: /schemas/types.yaml#/definitions/flag
157     description:                                  149     description:
158       Mark the corresponding energy efficient     150       Mark the corresponding energy efficient ethernet mode as
159       broken and request the ethernet to stop     151       broken and request the ethernet to stop advertising it.
160                                                   152 
161   pses:                                           153   pses:
162     $ref: /schemas/types.yaml#/definitions/pha    154     $ref: /schemas/types.yaml#/definitions/phandle-array
163     maxItems: 1                                   155     maxItems: 1
164     description:                                  156     description:
165       Specifies a reference to a node represen    157       Specifies a reference to a node representing a Power Sourcing Equipment.
166                                                   158 
167   phy-is-integrated:                              159   phy-is-integrated:
168     $ref: /schemas/types.yaml#/definitions/fla    160     $ref: /schemas/types.yaml#/definitions/flag
169     description:                                  161     description:
170       If set, indicates that the PHY is integr    162       If set, indicates that the PHY is integrated into the same
171       physical package as the Ethernet MAC. If    163       physical package as the Ethernet MAC. If needed, muxers
172       should be configured to ensure the integ    164       should be configured to ensure the integrated PHY is
173       used. The absence of this property indic    165       used. The absence of this property indicates the muxers
174       should be configured so that the externa    166       should be configured so that the external PHY is used.
175                                                   167 
176   resets:                                         168   resets:
177     maxItems: 1                                   169     maxItems: 1
178                                                   170 
179   reset-names:                                    171   reset-names:
180     const: phy                                    172     const: phy
181                                                   173 
182   reset-gpios:                                    174   reset-gpios:
183     maxItems: 1                                   175     maxItems: 1
184     description:                                  176     description:
185       The GPIO phandle and specifier for the P    177       The GPIO phandle and specifier for the PHY reset signal.
186                                                   178 
187   reset-assert-us:                                179   reset-assert-us:
188     description:                                  180     description:
189       Delay after the reset was asserted in mi    181       Delay after the reset was asserted in microseconds. If this
190       property is missing the delay will be sk    182       property is missing the delay will be skipped.
191                                                   183 
192   reset-deassert-us:                              184   reset-deassert-us:
193     description:                                  185     description:
194       Delay after the reset was deasserted in     186       Delay after the reset was deasserted in microseconds. If
195       this property is missing the delay will     187       this property is missing the delay will be skipped.
196                                                   188 
197   sfp:                                            189   sfp:
198     $ref: /schemas/types.yaml#/definitions/pha    190     $ref: /schemas/types.yaml#/definitions/phandle
199     description:                                  191     description:
200       Specifies a reference to a node represen    192       Specifies a reference to a node representing a SFP cage.
201                                                   193 
202   rx-internal-delay-ps:                           194   rx-internal-delay-ps:
203     description: |                                195     description: |
204       RGMII Receive PHY Clock Delay defined in    196       RGMII Receive PHY Clock Delay defined in pico seconds.  This is used for
205       PHY's that have configurable RX internal    197       PHY's that have configurable RX internal delays.  If this property is
206       present then the PHY applies the RX dela    198       present then the PHY applies the RX delay.
207                                                   199 
208   tx-internal-delay-ps:                           200   tx-internal-delay-ps:
209     description: |                                201     description: |
210       RGMII Transmit PHY Clock Delay defined i    202       RGMII Transmit PHY Clock Delay defined in pico seconds.  This is used for
211       PHY's that have configurable TX internal    203       PHY's that have configurable TX internal delays. If this property is
212       present then the PHY applies the TX dela    204       present then the PHY applies the TX delay.
213                                                   205 
214   leds:                                           206   leds:
215     type: object                                  207     type: object
216                                                   208 
217     properties:                                   209     properties:
218       '#address-cells':                           210       '#address-cells':
219         const: 1                                  211         const: 1
220                                                   212 
221       '#size-cells':                              213       '#size-cells':
222         const: 0                                  214         const: 0
223                                                   215 
224     patternProperties:                            216     patternProperties:
225       '^led@[a-f0-9]+$':                          217       '^led@[a-f0-9]+$':
226         $ref: /schemas/leds/common.yaml#          218         $ref: /schemas/leds/common.yaml#
227                                                   219 
228         properties:                               220         properties:
229           reg:                                    221           reg:
230             maxItems: 1                           222             maxItems: 1
231             description:                          223             description:
232               This define the LED index in the    224               This define the LED index in the PHY or the MAC. It's really
233               driver dependent and required fo    225               driver dependent and required for ports that define multiple
234               LED for the same port.              226               LED for the same port.
235                                                   227 
236         required:                                 228         required:
237           - reg                                   229           - reg
238                                                   230 
239         unevaluatedProperties: false              231         unevaluatedProperties: false
240                                                   232 
241     additionalProperties: false                   233     additionalProperties: false
242                                                   234 
243 required:                                         235 required:
244   - reg                                           236   - reg
245                                                   237 
246 additionalProperties: true                        238 additionalProperties: true
247                                                   239 
248 examples:                                         240 examples:
249   - |                                             241   - |
250     #include <dt-bindings/leds/common.h>          242     #include <dt-bindings/leds/common.h>
251                                                   243 
252     ethernet {                                    244     ethernet {
253         #address-cells = <1>;                     245         #address-cells = <1>;
254         #size-cells = <0>;                        246         #size-cells = <0>;
255                                                   247 
256         ethernet-phy@0 {                          248         ethernet-phy@0 {
257             compatible = "ethernet-phy-id0141.    249             compatible = "ethernet-phy-id0141.0e90", "ethernet-phy-ieee802.3-c45";
258             interrupt-parent = <&PIC>;            250             interrupt-parent = <&PIC>;
259             interrupts = <35 1>;                  251             interrupts = <35 1>;
260             reg = <0>;                            252             reg = <0>;
261                                                   253 
262             resets = <&rst 8>;                    254             resets = <&rst 8>;
263             reset-names = "phy";                  255             reset-names = "phy";
264             reset-gpios = <&gpio1 4 1>;           256             reset-gpios = <&gpio1 4 1>;
265             reset-assert-us = <1000>;             257             reset-assert-us = <1000>;
266             reset-deassert-us = <2000>;           258             reset-deassert-us = <2000>;
267                                                   259 
268             leds {                                260             leds {
269                 #address-cells = <1>;             261                 #address-cells = <1>;
270                 #size-cells = <0>;                262                 #size-cells = <0>;
271                                                   263 
272                 led@0 {                           264                 led@0 {
273                     reg = <0>;                    265                     reg = <0>;
274                     color = <LED_COLOR_ID_WHIT    266                     color = <LED_COLOR_ID_WHITE>;
275                     function = LED_FUNCTION_LA    267                     function = LED_FUNCTION_LAN;
276                     default-state = "keep";       268                     default-state = "keep";
277                 };                                269                 };
278             };                                    270             };
279         };                                        271         };
280     };                                            272     };
                                                      

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