1 # SPDX-License-Identifier: GPL-2.0-only OR BSD 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/net/microch 4 $id: http://devicetree.org/schemas/net/microchip,lan966x-switch.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: Microchip Lan966x Ethernet switch contr 7 title: Microchip Lan966x Ethernet switch controller
8 8
9 maintainers: 9 maintainers:
10 - Horatiu Vultur <horatiu.vultur@microchip.co 10 - Horatiu Vultur <horatiu.vultur@microchip.com>
11 11
12 description: | 12 description: |
13 The lan966x switch is a multi-port Gigabit A 13 The lan966x switch is a multi-port Gigabit AVB/TSN Ethernet Switch with
14 two integrated 10/100/1000Base-T PHYs. In ad 14 two integrated 10/100/1000Base-T PHYs. In addition to the integrated PHYs,
15 it supports up to 2RGMII/RMII, up to 3BASE-X 15 it supports up to 2RGMII/RMII, up to 3BASE-X/SERDES/2.5GBASE-X and up to
16 2 Quad-SGMII/Quad-USGMII interfaces. 16 2 Quad-SGMII/Quad-USGMII interfaces.
17 17
18 properties: 18 properties:
19 $nodename: 19 $nodename:
20 pattern: "^switch@[0-9a-f]+$" 20 pattern: "^switch@[0-9a-f]+$"
21 21
22 compatible: 22 compatible:
23 const: microchip,lan966x-switch 23 const: microchip,lan966x-switch
24 24
25 reg: 25 reg:
26 items: 26 items:
27 - description: cpu target 27 - description: cpu target
28 - description: general control block tar 28 - description: general control block target
29 29
30 reg-names: 30 reg-names:
31 items: 31 items:
32 - const: cpu 32 - const: cpu
33 - const: gcb 33 - const: gcb
34 34
35 interrupts: 35 interrupts:
36 minItems: 1 36 minItems: 1
37 items: 37 items:
38 - description: register based extraction 38 - description: register based extraction
39 - description: frame dma based extractio 39 - description: frame dma based extraction
40 - description: analyzer interrupt 40 - description: analyzer interrupt
41 - description: ptp interrupt <<
42 - description: ptp external interrupt <<
43 41
44 interrupt-names: 42 interrupt-names:
45 minItems: 1 43 minItems: 1
46 items: 44 items:
47 - const: xtr 45 - const: xtr
48 - const: fdma 46 - const: fdma
49 - const: ana 47 - const: ana
50 - const: ptp <<
51 - const: ptp-ext <<
52 48
53 resets: 49 resets:
54 items: 50 items:
55 - description: Reset controller used for 51 - description: Reset controller used for switch core reset (soft reset)
>> 52 - description: Reset controller used for releasing the phy from reset
56 53
57 reset-names: 54 reset-names:
58 items: 55 items:
59 - const: switch 56 - const: switch
>> 57 - const: phy
60 58
61 ethernet-ports: 59 ethernet-ports:
62 type: object 60 type: object
63 61
64 properties: 62 properties:
65 '#address-cells': 63 '#address-cells':
66 const: 1 64 const: 1
67 '#size-cells': 65 '#size-cells':
68 const: 0 66 const: 0
69 67
70 additionalProperties: false 68 additionalProperties: false
71 69
72 patternProperties: 70 patternProperties:
73 "^port@[0-9a-f]+$": 71 "^port@[0-9a-f]+$":
74 type: object 72 type: object
75 73
76 $ref: /schemas/net/ethernet-controller !! 74 $ref: "/schemas/net/ethernet-controller.yaml#"
77 unevaluatedProperties: false 75 unevaluatedProperties: false
78 76
79 properties: 77 properties:
80 '#address-cells': 78 '#address-cells':
81 const: 1 79 const: 1
82 '#size-cells': 80 '#size-cells':
83 const: 0 81 const: 0
84 82
85 reg: 83 reg:
86 description: 84 description:
87 Switch port number 85 Switch port number
88 86
89 phys: 87 phys:
90 description: 88 description:
91 Phandle of a Ethernet SerDes PHY 89 Phandle of a Ethernet SerDes PHY
92 90
93 phy-mode: 91 phy-mode:
94 description: 92 description:
95 This specifies the interface use 93 This specifies the interface used by the Ethernet SerDes towards
96 the PHY or SFP. 94 the PHY or SFP.
97 enum: 95 enum:
98 - gmii 96 - gmii
99 - sgmii 97 - sgmii
100 - qsgmii 98 - qsgmii
101 - 1000base-x 99 - 1000base-x
102 - 2500base-x 100 - 2500base-x
103 101
104 phy-handle: 102 phy-handle:
105 description: 103 description:
106 Phandle of a Ethernet PHY. 104 Phandle of a Ethernet PHY.
107 105
108 sfp: 106 sfp:
109 description: 107 description:
110 Phandle of an SFP. 108 Phandle of an SFP.
111 109
112 managed: true 110 managed: true
113 111
114 required: 112 required:
115 - reg 113 - reg
116 - phys 114 - phys
117 - phy-mode 115 - phy-mode
118 116
119 oneOf: 117 oneOf:
120 - required: 118 - required:
121 - phy-handle 119 - phy-handle
122 - required: 120 - required:
123 - sfp 121 - sfp
124 - managed 122 - managed
125 123
126 required: 124 required:
127 - compatible 125 - compatible
128 - reg 126 - reg
129 - reg-names 127 - reg-names
130 - interrupts 128 - interrupts
131 - interrupt-names 129 - interrupt-names
132 - resets 130 - resets
133 - reset-names 131 - reset-names
134 - ethernet-ports 132 - ethernet-ports
135 133
136 additionalProperties: false 134 additionalProperties: false
137 135
138 examples: 136 examples:
139 - | 137 - |
140 #include <dt-bindings/interrupt-controller 138 #include <dt-bindings/interrupt-controller/arm-gic.h>
141 switch: switch@e0000000 { 139 switch: switch@e0000000 {
142 compatible = "microchip,lan966x-switch"; 140 compatible = "microchip,lan966x-switch";
143 reg = <0xe0000000 0x0100000>, 141 reg = <0xe0000000 0x0100000>,
144 <0xe2000000 0x0800000>; 142 <0xe2000000 0x0800000>;
145 reg-names = "cpu", "gcb"; 143 reg-names = "cpu", "gcb";
146 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_ 144 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
147 interrupt-names = "xtr"; 145 interrupt-names = "xtr";
148 resets = <&switch_reset 0>; !! 146 resets = <&switch_reset 0>, <&phy_reset 0>;
149 reset-names = "switch"; !! 147 reset-names = "switch", "phy";
150 ethernet-ports { 148 ethernet-ports {
151 #address-cells = <1>; 149 #address-cells = <1>;
152 #size-cells = <0>; 150 #size-cells = <0>;
153 151
154 port0: port@0 { 152 port0: port@0 {
155 reg = <0>; 153 reg = <0>;
156 phy-handle = <&phy0>; 154 phy-handle = <&phy0>;
157 phys = <&serdes 0 0>; 155 phys = <&serdes 0 0>;
158 phy-mode = "gmii"; 156 phy-mode = "gmii";
159 }; 157 };
160 158
161 port1: port@1 { 159 port1: port@1 {
162 reg = <1>; 160 reg = <1>;
163 sfp = <&sfp_eth1>; 161 sfp = <&sfp_eth1>;
164 managed = "in-band-status"; 162 managed = "in-band-status";
165 phys = <&serdes 2 4>; 163 phys = <&serdes 2 4>;
166 phy-mode = "sgmii"; 164 phy-mode = "sgmii";
167 }; 165 };
168 }; 166 };
169 }; 167 };
170 168
171 ... 169 ...
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