1 # SPDX-License-Identifier: GPL-2.0-only OR BSD 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/net/microch 4 $id: http://devicetree.org/schemas/net/microchip,sparx5-switch.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: Microchip Sparx5 Ethernet switch contro 7 title: Microchip Sparx5 Ethernet switch controller
8 8
9 maintainers: 9 maintainers:
10 - Steen Hegelund <steen.hegelund@microchip.co 10 - Steen Hegelund <steen.hegelund@microchip.com>
11 - Lars Povlsen <lars.povlsen@microchip.com> 11 - Lars Povlsen <lars.povlsen@microchip.com>
12 12
13 description: | 13 description: |
14 The SparX-5 Enterprise Ethernet switch famil 14 The SparX-5 Enterprise Ethernet switch family provides a rich set of
15 Enterprise switching features such as advanc 15 Enterprise switching features such as advanced TCAM-based VLAN and
16 QoS processing enabling delivery of differen 16 QoS processing enabling delivery of differentiated services, and
17 security through TCAM-based frame processing 17 security through TCAM-based frame processing using versatile content
18 aware processor (VCAP). 18 aware processor (VCAP).
19 19
20 IPv4/IPv6 Layer 3 (L3) unicast and multicast 20 IPv4/IPv6 Layer 3 (L3) unicast and multicast routing is supported
21 with up to 18K IPv4/9K IPv6 unicast LPM entr 21 with up to 18K IPv4/9K IPv6 unicast LPM entries and up to 9K IPv4/3K
22 IPv6 (S,G) multicast groups. 22 IPv6 (S,G) multicast groups.
23 23
24 L3 security features include source guard an 24 L3 security features include source guard and reverse path
25 forwarding (uRPF) tasks. Additional L3 featu 25 forwarding (uRPF) tasks. Additional L3 features include VRF-Lite and
26 IP tunnels (IP over GRE/IP). 26 IP tunnels (IP over GRE/IP).
27 27
28 The SparX-5 switch family targets managed La 28 The SparX-5 switch family targets managed Layer 2 and Layer 3
29 equipment in SMB, SME, and Enterprise where 29 equipment in SMB, SME, and Enterprise where high port count
30 1G/2.5G/5G/10G switching with 10G/25G aggreg 30 1G/2.5G/5G/10G switching with 10G/25G aggregation links is required.
31 31
32 properties: 32 properties:
33 $nodename: 33 $nodename:
34 pattern: "^switch@[0-9a-f]+$" 34 pattern: "^switch@[0-9a-f]+$"
35 35
36 compatible: 36 compatible:
37 const: microchip,sparx5-switch 37 const: microchip,sparx5-switch
38 38
39 reg: 39 reg:
40 items: 40 items:
41 - description: cpu target 41 - description: cpu target
42 - description: devices target 42 - description: devices target
43 - description: general control block tar 43 - description: general control block target
44 44
45 reg-names: 45 reg-names:
46 items: 46 items:
47 - const: cpu 47 - const: cpu
48 - const: devices 48 - const: devices
49 - const: gcb 49 - const: gcb
50 50
51 interrupts: 51 interrupts:
52 minItems: 1 52 minItems: 1
53 items: 53 items:
54 - description: register based extraction 54 - description: register based extraction
55 - description: frame dma based extractio 55 - description: frame dma based extraction
56 - description: ptp interrupt <<
57 56
58 interrupt-names: 57 interrupt-names:
59 minItems: 1 58 minItems: 1
60 items: 59 items:
61 - const: xtr 60 - const: xtr
62 - const: fdma 61 - const: fdma
63 - const: ptp <<
64 62
65 resets: 63 resets:
66 items: 64 items:
67 - description: Reset controller used for 65 - description: Reset controller used for switch core reset (soft reset)
68 66
69 reset-names: 67 reset-names:
70 items: 68 items:
71 - const: switch 69 - const: switch
72 70
73 mac-address: true 71 mac-address: true
74 72
75 ethernet-ports: 73 ethernet-ports:
76 type: object 74 type: object
77 additionalProperties: false <<
78 <<
79 properties: <<
80 '#address-cells': <<
81 const: 1 <<
82 '#size-cells': <<
83 const: 0 <<
84 <<
85 patternProperties: 75 patternProperties:
86 "^port@[0-9a-f]+$": 76 "^port@[0-9a-f]+$":
87 $ref: /schemas/net/ethernet-controller !! 77 type: object
88 unevaluatedProperties: false <<
89 78
90 properties: 79 properties:
>> 80 '#address-cells':
>> 81 const: 1
>> 82 '#size-cells':
>> 83 const: 0
>> 84
91 reg: 85 reg:
92 description: Switch port number 86 description: Switch port number
93 87
94 phys: 88 phys:
95 maxItems: 1 89 maxItems: 1
96 description: 90 description:
97 phandle of a Ethernet SerDes PHY 91 phandle of a Ethernet SerDes PHY. This defines which SerDes
98 instance will handle the Etherne 92 instance will handle the Ethernet traffic.
99 93
>> 94 phy-mode:
>> 95 description:
>> 96 This specifies the interface used by the Ethernet SerDes towards
>> 97 the PHY or SFP.
>> 98
100 microchip,bandwidth: 99 microchip,bandwidth:
101 description: Specifies bandwidth i 100 description: Specifies bandwidth in Mbit/s allocated to the port.
102 $ref: /schemas/types.yaml#/definit !! 101 $ref: "/schemas/types.yaml#/definitions/uint32"
103 maximum: 25000 102 maximum: 25000
104 103
>> 104 phy-handle:
>> 105 description:
>> 106 phandle of a Ethernet PHY. This is optional and if provided it
>> 107 points to the cuPHY used by the Ethernet SerDes.
>> 108
>> 109 sfp:
>> 110 description:
>> 111 phandle of an SFP. This is optional and used when not specifying
>> 112 a cuPHY. It points to the SFP node that describes the SFP used by
>> 113 the Ethernet SerDes.
>> 114
>> 115 managed: true
>> 116
105 microchip,sd-sgpio: 117 microchip,sd-sgpio:
106 description: 118 description:
107 Index of the ports Signal Detect 119 Index of the ports Signal Detect SGPIO in the set of 384 SGPIOs
108 This is optional, and only neede 120 This is optional, and only needed if the default used index is
109 is not correct. 121 is not correct.
110 $ref: /schemas/types.yaml#/definit !! 122 $ref: "/schemas/types.yaml#/definitions/uint32"
111 minimum: 0 123 minimum: 0
112 maximum: 383 124 maximum: 383
113 125
114 required: 126 required:
115 - reg 127 - reg
116 - phys 128 - phys
117 - phy-mode 129 - phy-mode
118 - microchip,bandwidth 130 - microchip,bandwidth
119 131
120 oneOf: 132 oneOf:
121 - required: 133 - required:
122 - phy-handle 134 - phy-handle
123 - required: 135 - required:
124 - sfp 136 - sfp
125 - managed 137 - managed
126 138
127 required: 139 required:
128 - compatible 140 - compatible
129 - reg 141 - reg
130 - reg-names 142 - reg-names
131 - interrupts 143 - interrupts
132 - interrupt-names 144 - interrupt-names
>> 145 - resets
>> 146 - reset-names
133 - ethernet-ports 147 - ethernet-ports
134 148
135 additionalProperties: false 149 additionalProperties: false
136 150
137 examples: 151 examples:
138 - | 152 - |
139 #include <dt-bindings/interrupt-controller 153 #include <dt-bindings/interrupt-controller/arm-gic.h>
140 switch: switch@600000000 { 154 switch: switch@600000000 {
141 compatible = "microchip,sparx5-switch"; 155 compatible = "microchip,sparx5-switch";
142 reg = <0 0x401000>, 156 reg = <0 0x401000>,
143 <0x10004000 0x7fc000>, 157 <0x10004000 0x7fc000>,
144 <0x11010000 0xaf0000>; 158 <0x11010000 0xaf0000>;
145 reg-names = "cpu", "devices", "gcb"; 159 reg-names = "cpu", "devices", "gcb";
146 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_ 160 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
147 interrupt-names = "xtr"; 161 interrupt-names = "xtr";
148 resets = <&reset 0>; 162 resets = <&reset 0>;
149 reset-names = "switch"; 163 reset-names = "switch";
150 ethernet-ports { 164 ethernet-ports {
151 #address-cells = <1>; 165 #address-cells = <1>;
152 #size-cells = <0>; 166 #size-cells = <0>;
153 167
154 port0: port@0 { 168 port0: port@0 {
155 reg = <0>; 169 reg = <0>;
156 microchip,bandwidth = <1000>; 170 microchip,bandwidth = <1000>;
157 phys = <&serdes 13>; 171 phys = <&serdes 13>;
158 phy-handle = <&phy0>; 172 phy-handle = <&phy0>;
159 phy-mode = "qsgmii"; 173 phy-mode = "qsgmii";
160 }; 174 };
161 /* ... */ 175 /* ... */
162 /* Then the 25G interfaces */ 176 /* Then the 25G interfaces */
163 port60: port@60 { 177 port60: port@60 {
164 reg = <60>; 178 reg = <60>;
165 microchip,bandwidth = <25000>; 179 microchip,bandwidth = <25000>;
166 phys = <&serdes 29>; 180 phys = <&serdes 29>;
167 phy-mode = "10gbase-r"; 181 phy-mode = "10gbase-r";
168 sfp = <&sfp_eth60>; 182 sfp = <&sfp_eth60>;
169 managed = "in-band-status"; 183 managed = "in-band-status";
170 microchip,sd-sgpio = <365>; 184 microchip,sd-sgpio = <365>;
171 }; 185 };
172 port61: port@61 { 186 port61: port@61 {
173 reg = <61>; 187 reg = <61>;
174 microchip,bandwidth = <25000>; 188 microchip,bandwidth = <25000>;
175 phys = <&serdes 30>; 189 phys = <&serdes 30>;
176 phy-mode = "10gbase-r"; 190 phy-mode = "10gbase-r";
177 sfp = <&sfp_eth61>; 191 sfp = <&sfp_eth61>;
178 managed = "in-band-status"; 192 managed = "in-band-status";
179 microchip,sd-sgpio = <369>; 193 microchip,sd-sgpio = <369>;
180 }; 194 };
181 port62: port@62 { 195 port62: port@62 {
182 reg = <62>; 196 reg = <62>;
183 microchip,bandwidth = <25000>; 197 microchip,bandwidth = <25000>;
184 phys = <&serdes 31>; 198 phys = <&serdes 31>;
185 phy-mode = "10gbase-r"; 199 phy-mode = "10gbase-r";
186 sfp = <&sfp_eth62>; 200 sfp = <&sfp_eth62>;
187 managed = "in-band-status"; 201 managed = "in-band-status";
188 microchip,sd-sgpio = <373>; 202 microchip,sd-sgpio = <373>;
189 }; 203 };
190 port63: port@63 { 204 port63: port@63 {
191 reg = <63>; 205 reg = <63>;
192 microchip,bandwidth = <25000>; 206 microchip,bandwidth = <25000>;
193 phys = <&serdes 32>; 207 phys = <&serdes 32>;
194 phy-mode = "10gbase-r"; 208 phy-mode = "10gbase-r";
195 sfp = <&sfp_eth63>; 209 sfp = <&sfp_eth63>;
196 managed = "in-band-status"; 210 managed = "in-band-status";
197 microchip,sd-sgpio = <377>; 211 microchip,sd-sgpio = <377>;
198 }; 212 };
199 /* Finally the Management interface */ 213 /* Finally the Management interface */
200 port64: port@64 { 214 port64: port@64 {
201 reg = <64>; 215 reg = <64>;
202 microchip,bandwidth = <1000>; 216 microchip,bandwidth = <1000>;
203 phys = <&serdes 0>; 217 phys = <&serdes 0>;
204 phy-handle = <&phy64>; 218 phy-handle = <&phy64>;
205 phy-mode = "sgmii"; 219 phy-mode = "sgmii";
206 mac-address = [ 00 00 00 01 02 03 ]; 220 mac-address = [ 00 00 00 01 02 03 ];
207 }; 221 };
208 }; 222 };
209 }; 223 };
210 224
211 ... 225 ...
212 # vim: set ts=2 sw=2 sts=2 tw=80 et cc=80 ft= 226 # vim: set ts=2 sw=2 sts=2 tw=80 et cc=80 ft=yaml :
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