1 # SPDX-License-Identifier: GPL-2.0-only OR BSD 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/net/mscc,mi 4 $id: http://devicetree.org/schemas/net/mscc,miim.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: Microsemi MII Management Controller (MI 7 title: Microsemi MII Management Controller (MIIM)
8 8
9 maintainers: 9 maintainers:
10 - Alexandre Belloni <alexandre.belloni@bootli 10 - Alexandre Belloni <alexandre.belloni@bootlin.com>
11 11
12 allOf: 12 allOf:
13 - $ref: mdio.yaml# 13 - $ref: mdio.yaml#
14 14
15 properties: 15 properties:
16 compatible: 16 compatible:
17 enum: 17 enum:
18 - mscc,ocelot-miim 18 - mscc,ocelot-miim
19 - microchip,lan966x-miim 19 - microchip,lan966x-miim
20 20
21 "#address-cells": 21 "#address-cells":
22 const: 1 22 const: 1
23 23
24 "#size-cells": 24 "#size-cells":
25 const: 0 25 const: 0
26 26
27 reg: 27 reg:
28 items: 28 items:
29 - description: base address 29 - description: base address
30 - description: associated reset register 30 - description: associated reset register for internal PHYs
31 minItems: 1 31 minItems: 1
32 32
33 interrupts: 33 interrupts:
34 maxItems: 1 34 maxItems: 1
35 35
36 clocks: 36 clocks:
37 maxItems: 1 37 maxItems: 1
38 38
39 clock-frequency: true 39 clock-frequency: true
40 40
41 resets: <<
42 items: <<
43 - description: <<
44 Reset shared with all blocks attache <<
45 Bus (CSR) including VRAP slave. <<
46 <<
47 reset-names: <<
48 items: <<
49 - const: switch <<
50 <<
51 required: 41 required:
52 - compatible 42 - compatible
53 - reg 43 - reg
54 - "#address-cells" 44 - "#address-cells"
55 - "#size-cells" 45 - "#size-cells"
56 46
57 unevaluatedProperties: false 47 unevaluatedProperties: false
58 48
59 examples: 49 examples:
60 - | 50 - |
61 mdio@107009c { 51 mdio@107009c {
62 compatible = "mscc,ocelot-miim"; 52 compatible = "mscc,ocelot-miim";
63 reg = <0x107009c 0x36>, <0x10700f0 0x8>; 53 reg = <0x107009c 0x36>, <0x10700f0 0x8>;
64 interrupts = <14>; 54 interrupts = <14>;
65 #address-cells = <1>; 55 #address-cells = <1>;
66 #size-cells = <0>; 56 #size-cells = <0>;
67 57
68 phy0: ethernet-phy@0 { 58 phy0: ethernet-phy@0 {
69 reg = <0>; 59 reg = <0>;
70 }; 60 };
71 }; 61 };
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