1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-C 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/net/pcs/med 4 $id: http://devicetree.org/schemas/net/pcs/mediatek,sgmiisys.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: MediaTek SGMIISYS Controller 7 title: MediaTek SGMIISYS Controller
8 8
9 maintainers: 9 maintainers:
10 - Matthias Brugger <matthias.bgg@gmail.com> 10 - Matthias Brugger <matthias.bgg@gmail.com>
11 11
12 description: 12 description:
13 The MediaTek SGMIISYS controller provides a 13 The MediaTek SGMIISYS controller provides a SGMII PCS and some clocks
14 to the ethernet subsystem to which it is att 14 to the ethernet subsystem to which it is attached.
15 15
16 properties: 16 properties:
17 compatible: 17 compatible:
18 oneOf: 18 oneOf:
19 - items: 19 - items:
20 - enum: 20 - enum:
21 - mediatek,mt7622-sgmiisys 21 - mediatek,mt7622-sgmiisys
22 - mediatek,mt7629-sgmiisys 22 - mediatek,mt7629-sgmiisys
23 - mediatek,mt7981-sgmiisys_0 23 - mediatek,mt7981-sgmiisys_0
24 - mediatek,mt7981-sgmiisys_1 24 - mediatek,mt7981-sgmiisys_1
25 - mediatek,mt7986-sgmiisys_0 25 - mediatek,mt7986-sgmiisys_0
26 - mediatek,mt7986-sgmiisys_1 26 - mediatek,mt7986-sgmiisys_1
27 - const: syscon 27 - const: syscon
28 - items: 28 - items:
29 - enum: 29 - enum:
30 - mediatek,mt7988-sgmiisys0 30 - mediatek,mt7988-sgmiisys0
31 - mediatek,mt7988-sgmiisys1 31 - mediatek,mt7988-sgmiisys1
32 - const: simple-mfd 32 - const: simple-mfd
33 - const: syscon 33 - const: syscon
34 34
35 reg: 35 reg:
36 maxItems: 1 36 maxItems: 1
37 37
38 '#clock-cells': 38 '#clock-cells':
39 const: 1 39 const: 1
40 40
41 mediatek,pnswap: 41 mediatek,pnswap:
42 description: Invert polarity of the SGMII 42 description: Invert polarity of the SGMII data lanes
43 type: boolean 43 type: boolean
44 44
45 pcs: 45 pcs:
46 type: object 46 type: object
47 description: MediaTek LynxI HSGMII PCS 47 description: MediaTek LynxI HSGMII PCS
48 properties: 48 properties:
49 compatible: 49 compatible:
50 const: mediatek,mt7988-sgmii 50 const: mediatek,mt7988-sgmii
51 51
52 clocks: 52 clocks:
53 maxItems: 3 53 maxItems: 3
54 54
55 clock-names: 55 clock-names:
56 items: 56 items:
57 - const: sgmii_sel 57 - const: sgmii_sel
58 - const: sgmii_tx 58 - const: sgmii_tx
59 - const: sgmii_rx 59 - const: sgmii_rx
60 60
61 required: 61 required:
62 - compatible 62 - compatible
63 - clocks 63 - clocks
64 - clock-names 64 - clock-names
65 65
66 additionalProperties: false 66 additionalProperties: false
67 67
68 required: 68 required:
69 - compatible 69 - compatible
70 - reg 70 - reg
71 - '#clock-cells' 71 - '#clock-cells'
72 72
73 allOf: 73 allOf:
74 - if: 74 - if:
75 properties: 75 properties:
76 compatible: 76 compatible:
77 contains: 77 contains:
78 enum: 78 enum:
79 - mediatek,mt7988-sgmiisys0 79 - mediatek,mt7988-sgmiisys0
80 - mediatek,mt7988-sgmiisys1 80 - mediatek,mt7988-sgmiisys1
81 81
82 then: 82 then:
83 required: 83 required:
84 - pcs 84 - pcs
85 85
86 else: 86 else:
87 properties: 87 properties:
88 pcs: false 88 pcs: false
89 89
90 additionalProperties: false 90 additionalProperties: false
91 91
92 examples: 92 examples:
93 - | 93 - |
94 soc { 94 soc {
95 #address-cells = <2>; 95 #address-cells = <2>;
96 #size-cells = <2>; 96 #size-cells = <2>;
97 sgmiisys: syscon@1b128000 { 97 sgmiisys: syscon@1b128000 {
98 compatible = "mediatek,mt7622-sgmiisys 98 compatible = "mediatek,mt7622-sgmiisys", "syscon";
99 reg = <0 0x1b128000 0 0x1000>; 99 reg = <0 0x1b128000 0 0x1000>;
100 #clock-cells = <1>; 100 #clock-cells = <1>;
101 }; 101 };
102 }; 102 };
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