1 # SPDX-License-Identifier: (GPL-2.0-only OR BS 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/net/socione 4 $id: http://devicetree.org/schemas/net/socionext,synquacer-netsec.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: Socionext NetSec Ethernet Controller IP 7 title: Socionext NetSec Ethernet Controller IP
8 8
9 maintainers: 9 maintainers:
10 - Jassi Brar <jaswinder.singh@linaro.org> 10 - Jassi Brar <jaswinder.singh@linaro.org>
11 - Ilias Apalodimas <ilias.apalodimas@linaro.o 11 - Ilias Apalodimas <ilias.apalodimas@linaro.org>
12 12
13 allOf: 13 allOf:
14 - $ref: ethernet-controller.yaml# 14 - $ref: ethernet-controller.yaml#
15 15
16 properties: 16 properties:
17 compatible: 17 compatible:
18 const: socionext,synquacer-netsec 18 const: socionext,synquacer-netsec
19 19
20 reg: 20 reg:
21 items: 21 items:
22 - description: control register area 22 - description: control register area
23 - description: EEPROM holding the MAC ad 23 - description: EEPROM holding the MAC address and microengine firmware
24 24
25 clocks: 25 clocks:
26 maxItems: 1 26 maxItems: 1
27 27
28 clock-names: 28 clock-names:
29 const: phy_ref_clk 29 const: phy_ref_clk
30 30
31 dma-coherent: true 31 dma-coherent: true
32 32
33 interrupts: 33 interrupts:
34 maxItems: 1 34 maxItems: 1
35 35
36 mdio: 36 mdio:
37 $ref: mdio.yaml# 37 $ref: mdio.yaml#
38 38
39 required: 39 required:
40 - compatible 40 - compatible
41 - reg 41 - reg
42 - clocks 42 - clocks
43 - clock-names 43 - clock-names
44 - interrupts 44 - interrupts
45 - mdio 45 - mdio
46 46
47 unevaluatedProperties: false 47 unevaluatedProperties: false
48 48
49 examples: 49 examples:
50 - | 50 - |
51 #include <dt-bindings/interrupt-controller 51 #include <dt-bindings/interrupt-controller/arm-gic.h>
52 52
53 ethernet@522d0000 { 53 ethernet@522d0000 {
54 compatible = "socionext,synquacer-nets 54 compatible = "socionext,synquacer-netsec";
55 reg = <0x522d0000 0x10000>, <0x1000000 55 reg = <0x522d0000 0x10000>, <0x10000000 0x10000>;
56 interrupts = <GIC_SPI 176 IRQ_TYPE_LEV 56 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
57 clocks = <&clk_netsec>; 57 clocks = <&clk_netsec>;
58 clock-names = "phy_ref_clk"; 58 clock-names = "phy_ref_clk";
59 phy-mode = "rgmii"; 59 phy-mode = "rgmii";
60 max-speed = <1000>; 60 max-speed = <1000>;
61 max-frame-size = <9000>; 61 max-frame-size = <9000>;
62 phy-handle = <&phy1>; 62 phy-handle = <&phy1>;
63 63
64 mdio { 64 mdio {
65 #address-cells = <1>; 65 #address-cells = <1>;
66 #size-cells = <0>; 66 #size-cells = <0>;
67 phy1: ethernet-phy@1 { 67 phy1: ethernet-phy@1 {
68 compatible = "ethernet-phy-iee 68 compatible = "ethernet-phy-ieee802.3-c22";
69 reg = <1>; 69 reg = <1>;
70 }; 70 };
71 }; 71 };
72 }; 72 };
73 ... 73 ...
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