1 # SPDX-License-Identifier: (GPL-2.0-only OR BS 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/net/ti,cpsw 4 $id: http://devicetree.org/schemas/net/ti,cpsw-switch.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: TI SoC Ethernet Switch Controller (CPSW !! 7 title: TI SoC Ethernet Switch Controller (CPSW) Device Tree Bindings
8 8
9 maintainers: 9 maintainers:
10 - Siddharth Vadapalli <s-vadapalli@ti.com> !! 10 - Grygorii Strashko <grygorii.strashko@ti.com>
11 - Roger Quadros <rogerq@kernel.org> !! 11 - Sekhar Nori <nsekhar@ti.com>
12 12
13 description: 13 description:
14 The 3-port switch gigabit ethernet subsystem 14 The 3-port switch gigabit ethernet subsystem provides ethernet packet
15 communication and can be configured as an et 15 communication and can be configured as an ethernet switch. It provides the
16 gigabit media independent interface (GMII),r 16 gigabit media independent interface (GMII),reduced gigabit media
17 independent interface (RGMII), reduced media 17 independent interface (RGMII), reduced media independent interface (RMII),
18 the management data input output (MDIO) for 18 the management data input output (MDIO) for physical layer device (PHY)
19 management. 19 management.
20 20
21 properties: 21 properties:
22 compatible: 22 compatible:
23 oneOf: 23 oneOf:
24 - const: ti,cpsw-switch 24 - const: ti,cpsw-switch
25 - items: 25 - items:
26 - const: ti,am335x-cpsw-switch 26 - const: ti,am335x-cpsw-switch
27 - const: ti,cpsw-switch 27 - const: ti,cpsw-switch
28 - items: 28 - items:
29 - const: ti,am4372-cpsw-switch 29 - const: ti,am4372-cpsw-switch
30 - const: ti,cpsw-switch 30 - const: ti,cpsw-switch
31 - items: 31 - items:
32 - const: ti,dra7-cpsw-switch 32 - const: ti,dra7-cpsw-switch
33 - const: ti,cpsw-switch 33 - const: ti,cpsw-switch
34 34
35 reg: 35 reg:
36 maxItems: 1 36 maxItems: 1
37 description: 37 description:
38 The physical base address and size of fu 38 The physical base address and size of full the CPSW module IO range
39 39
40 '#address-cells': 40 '#address-cells':
41 const: 1 41 const: 1
42 42
43 '#size-cells': 43 '#size-cells':
44 const: 1 44 const: 1
45 45
46 ranges: true 46 ranges: true
47 47
48 clocks: 48 clocks:
49 maxItems: 1 49 maxItems: 1
50 description: CPSW functional clock 50 description: CPSW functional clock
51 51
52 clock-names: 52 clock-names:
53 items: 53 items:
54 - const: fck 54 - const: fck
55 55
56 interrupts: 56 interrupts:
57 items: 57 items:
58 - description: RX_THRESH interrupt 58 - description: RX_THRESH interrupt
59 - description: RX interrupt 59 - description: RX interrupt
60 - description: TX interrupt 60 - description: TX interrupt
61 - description: MISC interrupt 61 - description: MISC interrupt
62 62
63 interrupt-names: 63 interrupt-names:
64 items: 64 items:
65 - const: rx_thresh !! 65 - const: "rx_thresh"
66 - const: rx !! 66 - const: "rx"
67 - const: tx !! 67 - const: "tx"
68 - const: misc !! 68 - const: "misc"
69 69
70 pinctrl-names: true 70 pinctrl-names: true
71 71
72 syscon: 72 syscon:
73 $ref: /schemas/types.yaml#/definitions/pha 73 $ref: /schemas/types.yaml#/definitions/phandle
74 description: 74 description:
75 Phandle to the system control device nod 75 Phandle to the system control device node which provides access to
76 efuse IO range with MAC addresses 76 efuse IO range with MAC addresses
77 77
78 ethernet-ports: 78 ethernet-ports:
79 type: object 79 type: object
80 additionalProperties: false <<
81 <<
82 properties: 80 properties:
83 '#address-cells': 81 '#address-cells':
84 const: 1 82 const: 1
85 '#size-cells': 83 '#size-cells':
86 const: 0 84 const: 0
87 85
88 patternProperties: 86 patternProperties:
89 "^port@[12]$": !! 87 "^port@[0-9]+$":
90 type: object 88 type: object
91 description: CPSW external ports 89 description: CPSW external ports
92 90
93 $ref: ethernet-controller.yaml# !! 91 allOf:
94 unevaluatedProperties: false !! 92 - $ref: ethernet-controller.yaml#
95 93
96 properties: 94 properties:
97 reg: 95 reg:
98 items: 96 items:
99 - enum: [1, 2] 97 - enum: [1, 2]
100 description: CPSW port number 98 description: CPSW port number
101 99
102 phys: 100 phys:
103 maxItems: 1 101 maxItems: 1
104 description: phandle on phy-gmii-s 102 description: phandle on phy-gmii-sel PHY
105 103
106 label: 104 label:
107 description: label associated with 105 description: label associated with this port
108 106
109 ti,dual-emac-pvid: 107 ti,dual-emac-pvid:
110 $ref: /schemas/types.yaml#/definit 108 $ref: /schemas/types.yaml#/definitions/uint32
111 minimum: 1 109 minimum: 1
112 maximum: 1024 110 maximum: 1024
113 description: 111 description:
114 Specifies default PORT VID to be 112 Specifies default PORT VID to be used to segregate
115 ports. Default value - CPSW port 113 ports. Default value - CPSW port number.
116 114
117 required: 115 required:
118 - reg 116 - reg
119 - phys 117 - phys
120 118
121 cpts: 119 cpts:
122 type: object 120 type: object
123 unevaluatedProperties: false <<
124 description: 121 description:
125 The Common Platform Time Sync (CPTS) mod 122 The Common Platform Time Sync (CPTS) module
126 123
127 properties: 124 properties:
128 clocks: 125 clocks:
129 maxItems: 1 126 maxItems: 1
130 description: CPTS reference clock 127 description: CPTS reference clock
131 128
132 clock-names: 129 clock-names:
133 items: 130 items:
134 - const: cpts 131 - const: cpts
135 132
136 cpts_clock_mult: 133 cpts_clock_mult:
137 $ref: /schemas/types.yaml#/definitions 134 $ref: /schemas/types.yaml#/definitions/uint32
138 description: 135 description:
139 Numerator to convert input clock tic 136 Numerator to convert input clock ticks into ns
140 137
141 cpts_clock_shift: 138 cpts_clock_shift:
142 $ref: /schemas/types.yaml#/definitions 139 $ref: /schemas/types.yaml#/definitions/uint32
143 description: 140 description:
144 Denominator to convert input clock t 141 Denominator to convert input clock ticks into ns.
145 Mult and shift will be calculated ba 142 Mult and shift will be calculated basing on CPTS rftclk frequency if
146 both cpts_clock_shift and cpts_clock 143 both cpts_clock_shift and cpts_clock_mult properties are not provided.
147 144
148 required: 145 required:
149 - clocks 146 - clocks
150 - clock-names 147 - clock-names
151 148
152 patternProperties: 149 patternProperties:
153 "^mdio@": 150 "^mdio@":
154 type: object 151 type: object
155 description: 152 description:
156 CPSW MDIO bus. 153 CPSW MDIO bus.
157 $ref: ti,davinci-mdio.yaml# !! 154 $ref: "ti,davinci-mdio.yaml#"
158 155
159 156
160 required: 157 required:
161 - compatible 158 - compatible
162 - reg 159 - reg
163 - ranges 160 - ranges
164 - clocks 161 - clocks
165 - clock-names 162 - clock-names
166 - interrupts 163 - interrupts
167 - interrupt-names 164 - interrupt-names
168 - '#address-cells' 165 - '#address-cells'
169 - '#size-cells' 166 - '#size-cells'
170 167
171 additionalProperties: false 168 additionalProperties: false
172 169
173 examples: 170 examples:
174 - | 171 - |
175 #include <dt-bindings/interrupt-controller 172 #include <dt-bindings/interrupt-controller/irq.h>
176 #include <dt-bindings/interrupt-controller 173 #include <dt-bindings/interrupt-controller/arm-gic.h>
177 #include <dt-bindings/clock/dra7.h> 174 #include <dt-bindings/clock/dra7.h>
178 175
179 mac_sw: switch@0 { 176 mac_sw: switch@0 {
180 compatible = "ti,dra7-cpsw-switch","ti 177 compatible = "ti,dra7-cpsw-switch","ti,cpsw-switch";
181 reg = <0x0 0x4000>; 178 reg = <0x0 0x4000>;
182 ranges = <0 0 0x4000>; 179 ranges = <0 0 0x4000>;
183 clocks = <&gmac_main_clk>; 180 clocks = <&gmac_main_clk>;
184 clock-names = "fck"; 181 clock-names = "fck";
185 #address-cells = <1>; 182 #address-cells = <1>;
186 #size-cells = <1>; 183 #size-cells = <1>;
187 syscon = <&scm_conf>; 184 syscon = <&scm_conf>;
188 185
189 interrupts = <GIC_SPI 334 IRQ_TYPE_LEV 186 interrupts = <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
190 <GIC_SPI 335 IRQ_TYPE_LEV 187 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
191 <GIC_SPI 336 IRQ_TYPE_LEV 188 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
192 <GIC_SPI 337 IRQ_TYPE_LEV 189 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>;
193 interrupt-names = "rx_thresh", "rx", " 190 interrupt-names = "rx_thresh", "rx", "tx", "misc";
194 191
195 ethernet-ports { 192 ethernet-ports {
196 #address-cells = <1>; 193 #address-cells = <1>;
197 #size-cells = <0>; 194 #size-cells = <0>;
198 195
199 cpsw_port1: port@1 { 196 cpsw_port1: port@1 {
200 reg = <1>; 197 reg = <1>;
201 label = "port1"; 198 label = "port1";
202 mac-address = [ 00 00 199 mac-address = [ 00 00 00 00 00 00 ];
203 phys = <&phy_gmii_sel 200 phys = <&phy_gmii_sel 1>;
204 phy-handle = <ðphy0 201 phy-handle = <ðphy0_sw>;
205 phy-mode = "rgmii"; 202 phy-mode = "rgmii";
206 ti,dual-emac-pvid = <1 203 ti,dual-emac-pvid = <1>;
207 }; 204 };
208 205
209 cpsw_port2: port@2 { 206 cpsw_port2: port@2 {
210 reg = <2>; 207 reg = <2>;
211 label = "wan"; 208 label = "wan";
212 mac-address = [ 00 00 209 mac-address = [ 00 00 00 00 00 00 ];
213 phys = <&phy_gmii_sel 210 phys = <&phy_gmii_sel 2>;
214 phy-handle = <ðphy1 211 phy-handle = <ðphy1_sw>;
215 phy-mode = "rgmii"; 212 phy-mode = "rgmii";
216 ti,dual-emac-pvid = <2 213 ti,dual-emac-pvid = <2>;
217 }; 214 };
218 }; 215 };
219 216
220 davinci_mdio_sw: mdio@1000 { 217 davinci_mdio_sw: mdio@1000 {
221 compatible = "ti,cpsw-mdio","t 218 compatible = "ti,cpsw-mdio","ti,davinci_mdio";
222 reg = <0x1000 0x100>; 219 reg = <0x1000 0x100>;
223 clocks = <&gmac_clkctrl DRA7_G 220 clocks = <&gmac_clkctrl DRA7_GMAC_GMAC_CLKCTRL 0>;
224 clock-names = "fck"; 221 clock-names = "fck";
225 #address-cells = <1>; 222 #address-cells = <1>;
226 #size-cells = <0>; 223 #size-cells = <0>;
227 bus_freq = <1000000>; 224 bus_freq = <1000000>;
228 225
229 ethphy0_sw: ethernet-phy@0 { 226 ethphy0_sw: ethernet-phy@0 {
230 reg = <0>; 227 reg = <0>;
231 }; 228 };
232 229
233 ethphy1_sw: ethernet-phy@1 { 230 ethphy1_sw: ethernet-phy@1 {
234 reg = <1>; 231 reg = <1>;
235 }; 232 };
236 }; 233 };
237 234
238 cpts { 235 cpts {
239 clocks = <&gmac_clkctrl DRA7_G 236 clocks = <&gmac_clkctrl DRA7_GMAC_GMAC_CLKCTRL 25>;
240 clock-names = "cpts"; 237 clock-names = "cpts";
241 }; 238 };
242 }; 239 };
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