1 # SPDX-License-Identifier: (GPL-2.0-only OR BS 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/net/ti,cpsw 4 $id: http://devicetree.org/schemas/net/ti,cpsw-switch.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: TI SoC Ethernet Switch Controller (CPSW !! 7 title: TI SoC Ethernet Switch Controller (CPSW) Device Tree Bindings
8 8
9 maintainers: 9 maintainers:
10 - Siddharth Vadapalli <s-vadapalli@ti.com> !! 10 - Grygorii Strashko <grygorii.strashko@ti.com>
11 - Roger Quadros <rogerq@kernel.org> !! 11 - Sekhar Nori <nsekhar@ti.com>
12 12
13 description: 13 description:
14 The 3-port switch gigabit ethernet subsystem 14 The 3-port switch gigabit ethernet subsystem provides ethernet packet
15 communication and can be configured as an et 15 communication and can be configured as an ethernet switch. It provides the
16 gigabit media independent interface (GMII),r 16 gigabit media independent interface (GMII),reduced gigabit media
17 independent interface (RGMII), reduced media 17 independent interface (RGMII), reduced media independent interface (RMII),
18 the management data input output (MDIO) for 18 the management data input output (MDIO) for physical layer device (PHY)
19 management. 19 management.
20 20
21 properties: 21 properties:
22 compatible: 22 compatible:
23 oneOf: 23 oneOf:
24 - const: ti,cpsw-switch 24 - const: ti,cpsw-switch
25 - items: 25 - items:
26 - const: ti,am335x-cpsw-switch !! 26 - const: ti,am335x-cpsw-switch
27 - const: ti,cpsw-switch !! 27 - const: ti,cpsw-switch
28 - items: 28 - items:
29 - const: ti,am4372-cpsw-switch !! 29 - const: ti,am4372-cpsw-switch
30 - const: ti,cpsw-switch !! 30 - const: ti,cpsw-switch
31 - items: 31 - items:
32 - const: ti,dra7-cpsw-switch !! 32 - const: ti,dra7-cpsw-switch
33 - const: ti,cpsw-switch !! 33 - const: ti,cpsw-switch
34 34
35 reg: 35 reg:
36 maxItems: 1 36 maxItems: 1
37 description: 37 description:
38 The physical base address and size of fu !! 38 The physical base address and size of full the CPSW module IO range
39 <<
40 '#address-cells': <<
41 const: 1 <<
42 <<
43 '#size-cells': <<
44 const: 1 <<
45 39
46 ranges: true 40 ranges: true
47 41
48 clocks: 42 clocks:
49 maxItems: 1 43 maxItems: 1
50 description: CPSW functional clock 44 description: CPSW functional clock
51 45
52 clock-names: 46 clock-names:
53 items: 47 items:
54 - const: fck 48 - const: fck
55 49
56 interrupts: 50 interrupts:
57 items: 51 items:
58 - description: RX_THRESH interrupt 52 - description: RX_THRESH interrupt
59 - description: RX interrupt 53 - description: RX interrupt
60 - description: TX interrupt 54 - description: TX interrupt
61 - description: MISC interrupt 55 - description: MISC interrupt
62 56
63 interrupt-names: 57 interrupt-names:
64 items: 58 items:
65 - const: rx_thresh !! 59 - const: "rx_thresh"
66 - const: rx !! 60 - const: "rx"
67 - const: tx !! 61 - const: "tx"
68 - const: misc !! 62 - const: "misc"
69 63
70 pinctrl-names: true 64 pinctrl-names: true
71 65
72 syscon: 66 syscon:
73 $ref: /schemas/types.yaml#/definitions/pha !! 67 $ref: /schemas/types.yaml#definitions/phandle
74 description: 68 description:
75 Phandle to the system control device nod 69 Phandle to the system control device node which provides access to
76 efuse IO range with MAC addresses 70 efuse IO range with MAC addresses
77 71
78 ethernet-ports: 72 ethernet-ports:
79 type: object 73 type: object
80 additionalProperties: false <<
81 <<
82 properties: 74 properties:
83 '#address-cells': 75 '#address-cells':
84 const: 1 76 const: 1
85 '#size-cells': 77 '#size-cells':
86 const: 0 78 const: 0
87 79
88 patternProperties: 80 patternProperties:
89 "^port@[12]$": !! 81 "^port@[0-9]+$":
90 type: object !! 82 type: object
91 description: CPSW external ports !! 83 description: CPSW external ports
92 !! 84
93 $ref: ethernet-controller.yaml# !! 85 allOf:
94 unevaluatedProperties: false !! 86 - $ref: ethernet-controller.yaml#
95 !! 87
96 properties: !! 88 properties:
97 reg: !! 89 reg:
98 items: !! 90 items:
99 - enum: [1, 2] !! 91 - enum: [1, 2]
100 description: CPSW port number !! 92 description: CPSW port number
101 !! 93
102 phys: !! 94 phys:
103 maxItems: 1 !! 95 maxItems: 1
104 description: phandle on phy-gmii-s !! 96 description: phandle on phy-gmii-sel PHY
105 !! 97
106 label: !! 98 label:
107 description: label associated with !! 99 description: label associated with this port
108 !! 100
109 ti,dual-emac-pvid: !! 101 ti,dual-emac-pvid:
110 $ref: /schemas/types.yaml#/definit !! 102 allOf:
111 minimum: 1 !! 103 - $ref: /schemas/types.yaml#/definitions/uint32
112 maximum: 1024 !! 104 minimum: 1
113 description: !! 105 maximum: 1024
114 Specifies default PORT VID to be !! 106 description:
115 ports. Default value - CPSW port !! 107 Specifies default PORT VID to be used to segregate
116 !! 108 ports. Default value - CPSW port number.
117 required: !! 109
118 - reg !! 110 required:
119 - phys !! 111 - reg
>> 112 - phys
>> 113
>> 114 mdio:
>> 115 type: object
>> 116 allOf:
>> 117 - $ref: "ti,davinci-mdio.yaml#"
>> 118 description:
>> 119 CPSW MDIO bus.
120 120
121 cpts: 121 cpts:
122 type: object 122 type: object
123 unevaluatedProperties: false <<
124 description: 123 description:
125 The Common Platform Time Sync (CPTS) mod 124 The Common Platform Time Sync (CPTS) module
126 125
127 properties: 126 properties:
128 clocks: 127 clocks:
129 maxItems: 1 128 maxItems: 1
130 description: CPTS reference clock 129 description: CPTS reference clock
131 130
132 clock-names: 131 clock-names:
133 items: 132 items:
134 - const: cpts 133 - const: cpts
135 134
136 cpts_clock_mult: 135 cpts_clock_mult:
137 $ref: /schemas/types.yaml#/definitions 136 $ref: /schemas/types.yaml#/definitions/uint32
138 description: 137 description:
139 Numerator to convert input clock tic 138 Numerator to convert input clock ticks into ns
140 139
141 cpts_clock_shift: 140 cpts_clock_shift:
142 $ref: /schemas/types.yaml#/definitions 141 $ref: /schemas/types.yaml#/definitions/uint32
143 description: 142 description:
144 Denominator to convert input clock t 143 Denominator to convert input clock ticks into ns.
145 Mult and shift will be calculated ba 144 Mult and shift will be calculated basing on CPTS rftclk frequency if
146 both cpts_clock_shift and cpts_clock 145 both cpts_clock_shift and cpts_clock_mult properties are not provided.
147 146
148 required: 147 required:
149 - clocks 148 - clocks
150 - clock-names 149 - clock-names
151 150
152 patternProperties: <<
153 "^mdio@": <<
154 type: object <<
155 description: <<
156 CPSW MDIO bus. <<
157 $ref: ti,davinci-mdio.yaml# <<
158 <<
159 <<
160 required: 151 required:
161 - compatible 152 - compatible
162 - reg 153 - reg
163 - ranges 154 - ranges
164 - clocks 155 - clocks
165 - clock-names 156 - clock-names
166 - interrupts 157 - interrupts
167 - interrupt-names 158 - interrupt-names
168 - '#address-cells' 159 - '#address-cells'
169 - '#size-cells' 160 - '#size-cells'
170 161
171 additionalProperties: false <<
172 <<
173 examples: 162 examples:
174 - | 163 - |
175 #include <dt-bindings/interrupt-controller 164 #include <dt-bindings/interrupt-controller/irq.h>
176 #include <dt-bindings/interrupt-controller 165 #include <dt-bindings/interrupt-controller/arm-gic.h>
177 #include <dt-bindings/clock/dra7.h> 166 #include <dt-bindings/clock/dra7.h>
178 167
179 mac_sw: switch@0 { 168 mac_sw: switch@0 {
180 compatible = "ti,dra7-cpsw-switch","ti 169 compatible = "ti,dra7-cpsw-switch","ti,cpsw-switch";
181 reg = <0x0 0x4000>; 170 reg = <0x0 0x4000>;
182 ranges = <0 0 0x4000>; 171 ranges = <0 0 0x4000>;
183 clocks = <&gmac_main_clk>; 172 clocks = <&gmac_main_clk>;
184 clock-names = "fck"; 173 clock-names = "fck";
185 #address-cells = <1>; 174 #address-cells = <1>;
186 #size-cells = <1>; 175 #size-cells = <1>;
187 syscon = <&scm_conf>; 176 syscon = <&scm_conf>;
>> 177 inctrl-names = "default", "sleep";
188 178
189 interrupts = <GIC_SPI 334 IRQ_TYPE_LEV 179 interrupts = <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
190 <GIC_SPI 335 IRQ_TYPE_LEV 180 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
191 <GIC_SPI 336 IRQ_TYPE_LEV 181 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
192 <GIC_SPI 337 IRQ_TYPE_LEV 182 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>;
193 interrupt-names = "rx_thresh", "rx", " 183 interrupt-names = "rx_thresh", "rx", "tx", "misc";
194 184
195 ethernet-ports { 185 ethernet-ports {
196 #address-cells = <1>; 186 #address-cells = <1>;
197 #size-cells = <0>; 187 #size-cells = <0>;
198 188
199 cpsw_port1: port@1 { 189 cpsw_port1: port@1 {
200 reg = <1>; 190 reg = <1>;
201 label = "port1"; 191 label = "port1";
202 mac-address = [ 00 00 192 mac-address = [ 00 00 00 00 00 00 ];
203 phys = <&phy_gmii_sel 193 phys = <&phy_gmii_sel 1>;
204 phy-handle = <ðphy0 194 phy-handle = <ðphy0_sw>;
205 phy-mode = "rgmii"; 195 phy-mode = "rgmii";
206 ti,dual-emac-pvid = <1 196 ti,dual-emac-pvid = <1>;
207 }; 197 };
208 198
209 cpsw_port2: port@2 { 199 cpsw_port2: port@2 {
210 reg = <2>; 200 reg = <2>;
211 label = "wan"; 201 label = "wan";
212 mac-address = [ 00 00 202 mac-address = [ 00 00 00 00 00 00 ];
213 phys = <&phy_gmii_sel 203 phys = <&phy_gmii_sel 2>;
214 phy-handle = <ðphy1 204 phy-handle = <ðphy1_sw>;
215 phy-mode = "rgmii"; 205 phy-mode = "rgmii";
216 ti,dual-emac-pvid = <2 206 ti,dual-emac-pvid = <2>;
217 }; 207 };
218 }; 208 };
219 209
220 davinci_mdio_sw: mdio@1000 { 210 davinci_mdio_sw: mdio@1000 {
221 compatible = "ti,cpsw-mdio","t 211 compatible = "ti,cpsw-mdio","ti,davinci_mdio";
222 reg = <0x1000 0x100>; 212 reg = <0x1000 0x100>;
223 clocks = <&gmac_clkctrl DRA7_G 213 clocks = <&gmac_clkctrl DRA7_GMAC_GMAC_CLKCTRL 0>;
224 clock-names = "fck"; 214 clock-names = "fck";
225 #address-cells = <1>; 215 #address-cells = <1>;
226 #size-cells = <0>; 216 #size-cells = <0>;
227 bus_freq = <1000000>; 217 bus_freq = <1000000>;
228 218
229 ethphy0_sw: ethernet-phy@0 { 219 ethphy0_sw: ethernet-phy@0 {
230 reg = <0>; 220 reg = <0>;
231 }; 221 };
232 222
233 ethphy1_sw: ethernet-phy@1 { 223 ethphy1_sw: ethernet-phy@1 {
234 reg = <1>; 224 reg = <1>;
235 }; 225 };
236 }; 226 };
237 227
238 cpts { 228 cpts {
239 clocks = <&gmac_clkctrl DRA7_G 229 clocks = <&gmac_clkctrl DRA7_GMAC_GMAC_CLKCTRL 25>;
240 clock-names = "cpts"; 230 clock-names = "cpts";
241 }; 231 };
242 }; 232 };
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