1 # SPDX-License-Identifier: (GPL-2.0-only OR BS 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/net/ti,cpsw 4 $id: http://devicetree.org/schemas/net/ti,cpsw-switch.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: TI SoC Ethernet Switch Controller (CPSW !! 7 title: TI SoC Ethernet Switch Controller (CPSW) Device Tree Bindings
8 8
9 maintainers: 9 maintainers:
10 - Siddharth Vadapalli <s-vadapalli@ti.com> !! 10 - Grygorii Strashko <grygorii.strashko@ti.com>
11 - Roger Quadros <rogerq@kernel.org> !! 11 - Sekhar Nori <nsekhar@ti.com>
12 12
13 description: 13 description:
14 The 3-port switch gigabit ethernet subsystem 14 The 3-port switch gigabit ethernet subsystem provides ethernet packet
15 communication and can be configured as an et 15 communication and can be configured as an ethernet switch. It provides the
16 gigabit media independent interface (GMII),r 16 gigabit media independent interface (GMII),reduced gigabit media
17 independent interface (RGMII), reduced media 17 independent interface (RGMII), reduced media independent interface (RMII),
18 the management data input output (MDIO) for 18 the management data input output (MDIO) for physical layer device (PHY)
19 management. 19 management.
20 20
21 properties: 21 properties:
22 compatible: 22 compatible:
23 oneOf: 23 oneOf:
24 - const: ti,cpsw-switch 24 - const: ti,cpsw-switch
25 - items: 25 - items:
26 - const: ti,am335x-cpsw-switch !! 26 - const: ti,am335x-cpsw-switch
27 - const: ti,cpsw-switch !! 27 - const: ti,cpsw-switch
28 - items: 28 - items:
29 - const: ti,am4372-cpsw-switch !! 29 - const: ti,am4372-cpsw-switch
30 - const: ti,cpsw-switch !! 30 - const: ti,cpsw-switch
31 - items: 31 - items:
32 - const: ti,dra7-cpsw-switch !! 32 - const: ti,dra7-cpsw-switch
33 - const: ti,cpsw-switch !! 33 - const: ti,cpsw-switch
34 34
35 reg: 35 reg:
36 maxItems: 1 36 maxItems: 1
37 description: 37 description:
38 The physical base address and size of fu !! 38 The physical base address and size of full the CPSW module IO range
39 39
40 '#address-cells': 40 '#address-cells':
41 const: 1 41 const: 1
42 42
43 '#size-cells': 43 '#size-cells':
44 const: 1 44 const: 1
45 45
46 ranges: true 46 ranges: true
47 47
48 clocks: 48 clocks:
49 maxItems: 1 49 maxItems: 1
50 description: CPSW functional clock 50 description: CPSW functional clock
51 51
52 clock-names: 52 clock-names:
53 items: 53 items:
54 - const: fck 54 - const: fck
55 55
56 interrupts: 56 interrupts:
57 items: 57 items:
58 - description: RX_THRESH interrupt 58 - description: RX_THRESH interrupt
59 - description: RX interrupt 59 - description: RX interrupt
60 - description: TX interrupt 60 - description: TX interrupt
61 - description: MISC interrupt 61 - description: MISC interrupt
62 62
63 interrupt-names: 63 interrupt-names:
64 items: 64 items:
65 - const: rx_thresh !! 65 - const: "rx_thresh"
66 - const: rx !! 66 - const: "rx"
67 - const: tx !! 67 - const: "tx"
68 - const: misc !! 68 - const: "misc"
69 69
70 pinctrl-names: true 70 pinctrl-names: true
71 71
72 syscon: 72 syscon:
73 $ref: /schemas/types.yaml#/definitions/pha !! 73 $ref: /schemas/types.yaml#definitions/phandle
74 description: 74 description:
75 Phandle to the system control device nod 75 Phandle to the system control device node which provides access to
76 efuse IO range with MAC addresses 76 efuse IO range with MAC addresses
77 77
78 ethernet-ports: 78 ethernet-ports:
79 type: object 79 type: object
80 additionalProperties: false <<
81 <<
82 properties: 80 properties:
83 '#address-cells': 81 '#address-cells':
84 const: 1 82 const: 1
85 '#size-cells': 83 '#size-cells':
86 const: 0 84 const: 0
87 85
88 patternProperties: 86 patternProperties:
89 "^port@[12]$": !! 87 "^port@[0-9]+$":
90 type: object !! 88 type: object
91 description: CPSW external ports !! 89 description: CPSW external ports
92 !! 90
93 $ref: ethernet-controller.yaml# !! 91 allOf:
94 unevaluatedProperties: false !! 92 - $ref: ethernet-controller.yaml#
95 !! 93
96 properties: !! 94 properties:
97 reg: !! 95 reg:
98 items: !! 96 items:
99 - enum: [1, 2] !! 97 - enum: [1, 2]
100 description: CPSW port number !! 98 description: CPSW port number
101 !! 99
102 phys: !! 100 phys:
103 maxItems: 1 !! 101 maxItems: 1
104 description: phandle on phy-gmii-s !! 102 description: phandle on phy-gmii-sel PHY
105 !! 103
106 label: !! 104 label:
107 description: label associated with !! 105 description: label associated with this port
108 !! 106
109 ti,dual-emac-pvid: !! 107 ti,dual-emac-pvid:
110 $ref: /schemas/types.yaml#/definit !! 108 allOf:
111 minimum: 1 !! 109 - $ref: /schemas/types.yaml#/definitions/uint32
112 maximum: 1024 !! 110 minimum: 1
113 description: !! 111 maximum: 1024
114 Specifies default PORT VID to be !! 112 description:
115 ports. Default value - CPSW port !! 113 Specifies default PORT VID to be used to segregate
116 !! 114 ports. Default value - CPSW port number.
117 required: !! 115
118 - reg !! 116 required:
119 - phys !! 117 - reg
>> 118 - phys
120 119
121 cpts: 120 cpts:
122 type: object 121 type: object
123 unevaluatedProperties: false <<
124 description: 122 description:
125 The Common Platform Time Sync (CPTS) mod 123 The Common Platform Time Sync (CPTS) module
126 124
127 properties: 125 properties:
128 clocks: 126 clocks:
129 maxItems: 1 127 maxItems: 1
130 description: CPTS reference clock 128 description: CPTS reference clock
131 129
132 clock-names: 130 clock-names:
133 items: 131 items:
134 - const: cpts 132 - const: cpts
135 133
136 cpts_clock_mult: 134 cpts_clock_mult:
137 $ref: /schemas/types.yaml#/definitions 135 $ref: /schemas/types.yaml#/definitions/uint32
138 description: 136 description:
139 Numerator to convert input clock tic 137 Numerator to convert input clock ticks into ns
140 138
141 cpts_clock_shift: 139 cpts_clock_shift:
142 $ref: /schemas/types.yaml#/definitions 140 $ref: /schemas/types.yaml#/definitions/uint32
143 description: 141 description:
144 Denominator to convert input clock t 142 Denominator to convert input clock ticks into ns.
145 Mult and shift will be calculated ba 143 Mult and shift will be calculated basing on CPTS rftclk frequency if
146 both cpts_clock_shift and cpts_clock 144 both cpts_clock_shift and cpts_clock_mult properties are not provided.
147 145
148 required: 146 required:
149 - clocks 147 - clocks
150 - clock-names 148 - clock-names
151 149
152 patternProperties: 150 patternProperties:
153 "^mdio@": 151 "^mdio@":
154 type: object 152 type: object
>> 153 allOf:
>> 154 - $ref: "ti,davinci-mdio.yaml#"
155 description: 155 description:
156 CPSW MDIO bus. 156 CPSW MDIO bus.
157 $ref: ti,davinci-mdio.yaml# <<
158 157
159 158
160 required: 159 required:
161 - compatible 160 - compatible
162 - reg 161 - reg
163 - ranges 162 - ranges
164 - clocks 163 - clocks
165 - clock-names 164 - clock-names
166 - interrupts 165 - interrupts
167 - interrupt-names 166 - interrupt-names
168 - '#address-cells' 167 - '#address-cells'
169 - '#size-cells' 168 - '#size-cells'
170 169
171 additionalProperties: false 170 additionalProperties: false
172 171
173 examples: 172 examples:
174 - | 173 - |
175 #include <dt-bindings/interrupt-controller 174 #include <dt-bindings/interrupt-controller/irq.h>
176 #include <dt-bindings/interrupt-controller 175 #include <dt-bindings/interrupt-controller/arm-gic.h>
177 #include <dt-bindings/clock/dra7.h> 176 #include <dt-bindings/clock/dra7.h>
178 177
179 mac_sw: switch@0 { 178 mac_sw: switch@0 {
180 compatible = "ti,dra7-cpsw-switch","ti 179 compatible = "ti,dra7-cpsw-switch","ti,cpsw-switch";
181 reg = <0x0 0x4000>; 180 reg = <0x0 0x4000>;
182 ranges = <0 0 0x4000>; 181 ranges = <0 0 0x4000>;
183 clocks = <&gmac_main_clk>; 182 clocks = <&gmac_main_clk>;
184 clock-names = "fck"; 183 clock-names = "fck";
185 #address-cells = <1>; 184 #address-cells = <1>;
186 #size-cells = <1>; 185 #size-cells = <1>;
187 syscon = <&scm_conf>; 186 syscon = <&scm_conf>;
188 187
189 interrupts = <GIC_SPI 334 IRQ_TYPE_LEV 188 interrupts = <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
190 <GIC_SPI 335 IRQ_TYPE_LEV 189 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
191 <GIC_SPI 336 IRQ_TYPE_LEV 190 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
192 <GIC_SPI 337 IRQ_TYPE_LEV 191 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>;
193 interrupt-names = "rx_thresh", "rx", " 192 interrupt-names = "rx_thresh", "rx", "tx", "misc";
194 193
195 ethernet-ports { 194 ethernet-ports {
196 #address-cells = <1>; 195 #address-cells = <1>;
197 #size-cells = <0>; 196 #size-cells = <0>;
198 197
199 cpsw_port1: port@1 { 198 cpsw_port1: port@1 {
200 reg = <1>; 199 reg = <1>;
201 label = "port1"; 200 label = "port1";
202 mac-address = [ 00 00 201 mac-address = [ 00 00 00 00 00 00 ];
203 phys = <&phy_gmii_sel 202 phys = <&phy_gmii_sel 1>;
204 phy-handle = <ðphy0 203 phy-handle = <ðphy0_sw>;
205 phy-mode = "rgmii"; 204 phy-mode = "rgmii";
206 ti,dual-emac-pvid = <1 205 ti,dual-emac-pvid = <1>;
207 }; 206 };
208 207
209 cpsw_port2: port@2 { 208 cpsw_port2: port@2 {
210 reg = <2>; 209 reg = <2>;
211 label = "wan"; 210 label = "wan";
212 mac-address = [ 00 00 211 mac-address = [ 00 00 00 00 00 00 ];
213 phys = <&phy_gmii_sel 212 phys = <&phy_gmii_sel 2>;
214 phy-handle = <ðphy1 213 phy-handle = <ðphy1_sw>;
215 phy-mode = "rgmii"; 214 phy-mode = "rgmii";
216 ti,dual-emac-pvid = <2 215 ti,dual-emac-pvid = <2>;
217 }; 216 };
218 }; 217 };
219 218
220 davinci_mdio_sw: mdio@1000 { 219 davinci_mdio_sw: mdio@1000 {
221 compatible = "ti,cpsw-mdio","t 220 compatible = "ti,cpsw-mdio","ti,davinci_mdio";
222 reg = <0x1000 0x100>; 221 reg = <0x1000 0x100>;
223 clocks = <&gmac_clkctrl DRA7_G 222 clocks = <&gmac_clkctrl DRA7_GMAC_GMAC_CLKCTRL 0>;
224 clock-names = "fck"; 223 clock-names = "fck";
225 #address-cells = <1>; 224 #address-cells = <1>;
226 #size-cells = <0>; 225 #size-cells = <0>;
227 bus_freq = <1000000>; 226 bus_freq = <1000000>;
228 227
229 ethphy0_sw: ethernet-phy@0 { 228 ethphy0_sw: ethernet-phy@0 {
230 reg = <0>; 229 reg = <0>;
231 }; 230 };
232 231
233 ethphy1_sw: ethernet-phy@1 { 232 ethphy1_sw: ethernet-phy@1 {
234 reg = <1>; 233 reg = <1>;
235 }; 234 };
236 }; 235 };
237 236
238 cpts { 237 cpts {
239 clocks = <&gmac_clkctrl DRA7_G 238 clocks = <&gmac_clkctrl DRA7_GMAC_GMAC_CLKCTRL 25>;
240 clock-names = "cpts"; 239 clock-names = "cpts";
241 }; 240 };
242 }; 241 };
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