1 # SPDX-License-Identifier: (GPL-2.0-only OR BS 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/nvmem/fsl,l 4 $id: http://devicetree.org/schemas/nvmem/fsl,layerscape-sfp.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: Freescale Layerscape Security Fuse Proc 7 title: Freescale Layerscape Security Fuse Processor
8 8
9 maintainers: 9 maintainers:
10 - Michael Walle <michael@walle.cc> 10 - Michael Walle <michael@walle.cc>
11 11
12 description: | 12 description: |
13 SFP is the security fuse processor which amo !! 13 SFP is the security fuse processor which among other things provide a
14 unique identifier per part. 14 unique identifier per part.
15 15
16 allOf: 16 allOf:
17 - $ref: nvmem.yaml# !! 17 - $ref: "nvmem.yaml#"
18 - $ref: nvmem-deprecated-cells.yaml <<
19 18
20 properties: 19 properties:
21 compatible: 20 compatible:
22 oneOf: !! 21 enum:
23 - description: Trust architecture 2.1 SF !! 22 - fsl,ls1028a-sfp
24 items: <<
25 - const: fsl,ls1021a-sfp <<
26 - description: Trust architecture 3.0 SF <<
27 items: <<
28 - const: fsl,ls1028a-sfp <<
29 23
30 reg: 24 reg:
31 maxItems: 1 25 maxItems: 1
32 26
33 clocks: 27 clocks:
34 maxItems: 1 28 maxItems: 1
35 description: 29 description:
36 The SFP clock. Typically, this is the pl 30 The SFP clock. Typically, this is the platform clock divided by 4.
37 31
38 clock-names: 32 clock-names:
39 const: sfp 33 const: sfp
40 <<
41 ta-prog-sfp-supply: <<
42 description: <<
43 The regulator for the TA_PROG_SFP pin. I <<
44 and disabled for reading. <<
45 34
46 required: 35 required:
47 - compatible 36 - compatible
48 - reg 37 - reg
49 - clock-names 38 - clock-names
50 - clocks 39 - clocks
51 40
52 unevaluatedProperties: false 41 unevaluatedProperties: false
53 42
54 examples: 43 examples:
55 - | 44 - |
56 #include <dt-bindings/clock/fsl,qoriq-cloc 45 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
57 efuse@1e80000 { 46 efuse@1e80000 {
58 compatible = "fsl,ls1028a-sfp"; 47 compatible = "fsl,ls1028a-sfp";
59 reg = <0x1e80000 0x8000>; 48 reg = <0x1e80000 0x8000>;
60 clocks = <&clockgen QORIQ_CLK_PLATFORM 49 clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
61 QORIQ_CLK_PLL_DIV( 50 QORIQ_CLK_PLL_DIV(4)>;
62 clock-names = "sfp"; 51 clock-names = "sfp";
63 }; 52 };
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