1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-C 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/nvmem/imx-o 4 $id: http://devicetree.org/schemas/nvmem/imx-ocotp.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: Freescale i.MX On-Chip OTP Controller ( 7 title: Freescale i.MX On-Chip OTP Controller (OCOTP)
8 8
9 maintainers: 9 maintainers:
10 - Shawn Guo <shawnguo@kernel.org> !! 10 - Anson Huang <Anson.Huang@nxp.com>
11 - Sascha Hauer <s.hauer@pengutronix.de> <<
12 - Fabio Estevam <festevam@gmail.com> <<
13 11
14 description: | 12 description: |
15 This binding represents the on-chip eFuse OT 13 This binding represents the on-chip eFuse OTP controller found on
16 i.MX6Q/D, i.MX6DL/S, i.MX6SL, i.MX6SX, i.MX6 14 i.MX6Q/D, i.MX6DL/S, i.MX6SL, i.MX6SX, i.MX6UL, i.MX6ULL/ULZ, i.MX6SLL,
17 i.MX7D/S, i.MX7ULP, i.MX8MQ, i.MX8MM, i.MX8M !! 15 i.MX7D/S, i.MX7ULP, i.MX8MQ, i.MX8MM, i.MX8MN i.MX8MP and i.MX93 SoCs.
18 16
19 allOf: 17 allOf:
20 - $ref: nvmem.yaml# 18 - $ref: nvmem.yaml#
21 - $ref: nvmem-deprecated-cells.yaml# 19 - $ref: nvmem-deprecated-cells.yaml#
22 20
23 properties: 21 properties:
24 compatible: 22 compatible:
25 oneOf: 23 oneOf:
26 - items: 24 - items:
27 - enum: 25 - enum:
28 - fsl,imx6q-ocotp 26 - fsl,imx6q-ocotp
29 - fsl,imx6sl-ocotp 27 - fsl,imx6sl-ocotp
30 - fsl,imx6sx-ocotp 28 - fsl,imx6sx-ocotp
31 - fsl,imx6ul-ocotp 29 - fsl,imx6ul-ocotp
32 - fsl,imx6ull-ocotp 30 - fsl,imx6ull-ocotp
33 - fsl,imx7d-ocotp 31 - fsl,imx7d-ocotp
34 - fsl,imx6sll-ocotp 32 - fsl,imx6sll-ocotp
35 - fsl,imx7ulp-ocotp 33 - fsl,imx7ulp-ocotp
36 - fsl,imx8mq-ocotp 34 - fsl,imx8mq-ocotp
37 - fsl,imx8mm-ocotp 35 - fsl,imx8mm-ocotp
38 - fsl,imx93-ocotp 36 - fsl,imx93-ocotp
39 - fsl,imx95-ocotp <<
40 - const: syscon 37 - const: syscon
41 - items: 38 - items:
42 - enum: 39 - enum:
43 - fsl,imx8mn-ocotp 40 - fsl,imx8mn-ocotp
44 # i.MX8MP not really compatible 41 # i.MX8MP not really compatible with fsl,imx8mm-ocotp, however
45 # the code for getting SoC revis 42 # the code for getting SoC revision depends on fsl,imx8mm-ocotp
46 # compatible. 43 # compatible.
47 - fsl,imx8mp-ocotp 44 - fsl,imx8mp-ocotp
48 - const: fsl,imx8mm-ocotp 45 - const: fsl,imx8mm-ocotp
49 - const: syscon 46 - const: syscon
50 47
51 reg: 48 reg:
52 maxItems: 1 49 maxItems: 1
53 50
54 clocks: 51 clocks:
55 maxItems: 1 52 maxItems: 1
56 53
57 required: 54 required:
58 - "#address-cells" 55 - "#address-cells"
59 - "#size-cells" 56 - "#size-cells"
60 - compatible 57 - compatible
61 - reg 58 - reg
62 59
63 unevaluatedProperties: false 60 unevaluatedProperties: false
64 61
65 examples: 62 examples:
66 - | 63 - |
67 #include <dt-bindings/clock/imx6sx-clock.h 64 #include <dt-bindings/clock/imx6sx-clock.h>
68 65
69 ocotp: efuse@21bc000 { 66 ocotp: efuse@21bc000 {
70 #address-cells = <1>; 67 #address-cells = <1>;
71 #size-cells = <1>; 68 #size-cells = <1>;
72 compatible = "fsl,imx6sx-ocotp", "sysc 69 compatible = "fsl,imx6sx-ocotp", "syscon";
73 reg = <0x021bc000 0x4000>; 70 reg = <0x021bc000 0x4000>;
74 clocks = <&clks IMX6SX_CLK_OCOTP>; 71 clocks = <&clks IMX6SX_CLK_OCOTP>;
75 72
76 cpu_speed_grade: speed-grade@10 { 73 cpu_speed_grade: speed-grade@10 {
77 reg = <0x10 4>; 74 reg = <0x10 4>;
78 }; 75 };
79 76
80 tempmon_calib: calib@38 { 77 tempmon_calib: calib@38 {
81 reg = <0x38 4>; 78 reg = <0x38 4>;
82 }; 79 };
83 80
84 tempmon_temp_grade: temp-grade@20 { 81 tempmon_temp_grade: temp-grade@20 {
85 reg = <0x20 4>; 82 reg = <0x20 4>;
86 }; 83 };
87 }; 84 };
88 85
89 ... 86 ...
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