1 # SPDX-License-Identifier: (GPL-2.0-only OR BS 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/nvmem/qcom, 4 $id: http://devicetree.org/schemas/nvmem/qcom,sec-qfprom.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: Qualcomm Technologies Inc, Secure QFPRO 7 title: Qualcomm Technologies Inc, Secure QFPROM Efuse
8 8
9 maintainers: 9 maintainers:
10 - Komal Bajaj <quic_kbajaj@quicinc.com> 10 - Komal Bajaj <quic_kbajaj@quicinc.com>
11 11
12 description: 12 description:
13 For some of the Qualcomm SoC's, it is possib 13 For some of the Qualcomm SoC's, it is possible that the qfprom region is
14 protected from non-secure access. In such si 14 protected from non-secure access. In such situations, the OS have to use
15 secure calls to read the region. 15 secure calls to read the region.
16 16
17 allOf: 17 allOf:
18 - $ref: nvmem.yaml# 18 - $ref: nvmem.yaml#
19 - $ref: nvmem-deprecated-cells.yaml# <<
20 19
21 properties: 20 properties:
22 compatible: 21 compatible:
23 items: 22 items:
24 - enum: 23 - enum:
25 - qcom,qdu1000-sec-qfprom 24 - qcom,qdu1000-sec-qfprom
26 - const: qcom,sec-qfprom 25 - const: qcom,sec-qfprom
27 26
28 reg: 27 reg:
29 items: 28 items:
30 - description: The secure qfprom correct 29 - description: The secure qfprom corrected region.
31 30
32 required: 31 required:
33 - compatible 32 - compatible
34 - reg 33 - reg
35 34
36 unevaluatedProperties: false 35 unevaluatedProperties: false
37 36
38 examples: 37 examples:
39 - | 38 - |
40 soc { 39 soc {
41 #address-cells = <2>; 40 #address-cells = <2>;
42 #size-cells = <2>; 41 #size-cells = <2>;
43 42
44 efuse@221c8000 { 43 efuse@221c8000 {
45 compatible = "qcom,qdu1000-sec-qfprom" 44 compatible = "qcom,qdu1000-sec-qfprom", "qcom,sec-qfprom";
46 reg = <0 0x221c8000 0 0x1000>; 45 reg = <0 0x221c8000 0 0x1000>;
47 #address-cells = <1>; 46 #address-cells = <1>;
48 #size-cells = <1>; 47 #size-cells = <1>;
49 48
50 multi_chan_ddr: multi-chan-ddr@12b { 49 multi_chan_ddr: multi-chan-ddr@12b {
51 reg = <0x12b 0x1>; 50 reg = <0x12b 0x1>;
52 bits = <0 2>; 51 bits = <0 2>;
53 }; 52 };
54 }; 53 };
55 }; 54 };
56 55
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