1 # SPDX-License-Identifier: (GPL-2.0-only OR BS 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/nvmem/socio 4 $id: http://devicetree.org/schemas/nvmem/socionext,uniphier-efuse.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: Socionext UniPhier eFuse !! 7 title: Socionext UniPhier eFuse bindings
8 8
9 maintainers: 9 maintainers:
10 - Keiji Hayashibara <hayashibara.keiji@socion 10 - Keiji Hayashibara <hayashibara.keiji@socionext.com>
11 - Kunihiko Hayashi <hayashi.kunihiko@socionex 11 - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
12 12
13 allOf: 13 allOf:
14 - $ref: nvmem.yaml# !! 14 - $ref: "nvmem.yaml#"
15 - $ref: nvmem-deprecated-cells.yaml# <<
16 15
17 properties: 16 properties:
>> 17 "#address-cells": true
>> 18 "#size-cells": true
>> 19
18 compatible: 20 compatible:
19 const: socionext,uniphier-efuse 21 const: socionext,uniphier-efuse
20 22
21 reg: 23 reg:
22 maxItems: 1 24 maxItems: 1
23 25
24 required: 26 required:
25 - compatible 27 - compatible
26 - reg 28 - reg
27 29
28 unevaluatedProperties: false 30 unevaluatedProperties: false
29 31
30 examples: 32 examples:
31 - | 33 - |
32 efuse@100 { !! 34 // The UniPhier eFuse should be a subnode of a "soc-glue" node.
33 compatible = "socionext,uniphier-efuse !! 35
34 reg = <0x100 0x28>; !! 36 soc-glue@5f900000 {
35 }; !! 37 compatible = "simple-mfd";
36 <<
37 efuse@200 { <<
38 compatible = "socionext,uniphier-efuse <<
39 reg = <0x200 0x68>; <<
40 #address-cells = <1>; 38 #address-cells = <1>;
41 #size-cells = <1>; 39 #size-cells = <1>;
>> 40 ranges = <0x0 0x5f900000 0x2000>;
42 41
43 /* Data cells */ !! 42 efuse@100 {
44 usb_rterm0: trim@54,4 { !! 43 compatible = "socionext,uniphier-efuse";
45 reg = <0x54 1>; !! 44 reg = <0x100 0x28>;
46 bits = <4 2>; !! 45 };
47 }; !! 46
48 usb_rterm1: trim@55,4 { !! 47 efuse@200 {
49 reg = <0x55 1>; !! 48 compatible = "socionext,uniphier-efuse";
50 bits = <4 2>; !! 49 reg = <0x200 0x68>;
51 }; !! 50 #address-cells = <1>;
52 usb_rterm2: trim@58,4 { !! 51 #size-cells = <1>;
53 reg = <0x58 1>; !! 52
54 bits = <4 2>; !! 53 /* Data cells */
55 }; !! 54 usb_rterm0: trim@54,4 {
56 usb_rterm3: trim@59,4 { !! 55 reg = <0x54 1>;
57 reg = <0x59 1>; !! 56 bits = <4 2>;
58 bits = <4 2>; !! 57 };
59 }; !! 58 usb_rterm1: trim@55,4 {
60 usb_sel_t0: trim@54,0 { !! 59 reg = <0x55 1>;
61 reg = <0x54 1>; !! 60 bits = <4 2>;
62 bits = <0 4>; !! 61 };
63 }; !! 62 usb_rterm2: trim@58,4 {
64 usb_sel_t1: trim@55,0 { !! 63 reg = <0x58 1>;
65 reg = <0x55 1>; !! 64 bits = <4 2>;
66 bits = <0 4>; !! 65 };
67 }; !! 66 usb_rterm3: trim@59,4 {
68 usb_sel_t2: trim@58,0 { !! 67 reg = <0x59 1>;
69 reg = <0x58 1>; !! 68 bits = <4 2>;
70 bits = <0 4>; !! 69 };
71 }; !! 70 usb_sel_t0: trim@54,0 {
72 usb_sel_t3: trim@59,0 { !! 71 reg = <0x54 1>;
73 reg = <0x59 1>; !! 72 bits = <0 4>;
74 bits = <0 4>; !! 73 };
75 }; !! 74 usb_sel_t1: trim@55,0 {
76 usb_hs_i0: trim@56,0 { !! 75 reg = <0x55 1>;
77 reg = <0x56 1>; !! 76 bits = <0 4>;
78 bits = <0 4>; !! 77 };
79 }; !! 78 usb_sel_t2: trim@58,0 {
80 usb_hs_i2: trim@5a,0 { !! 79 reg = <0x58 1>;
81 reg = <0x5a 1>; !! 80 bits = <0 4>;
82 bits = <0 4>; !! 81 };
>> 82 usb_sel_t3: trim@59,0 {
>> 83 reg = <0x59 1>;
>> 84 bits = <0 4>;
>> 85 };
>> 86 usb_hs_i0: trim@56,0 {
>> 87 reg = <0x56 1>;
>> 88 bits = <0 4>;
>> 89 };
>> 90 usb_hs_i2: trim@5a,0 {
>> 91 reg = <0x5a 1>;
>> 92 bits = <0 4>;
>> 93 };
83 }; 94 };
84 }; 95 };
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