1 * Amazon Annapurna Labs PCIe host bridge 1 * Amazon Annapurna Labs PCIe host bridge
2 2
3 Amazon's Annapurna Labs PCIe Host Controller i 3 Amazon's Annapurna Labs PCIe Host Controller is based on the Synopsys DesignWare
4 PCI core. It inherits common properties define 4 PCI core. It inherits common properties defined in
5 Documentation/devicetree/bindings/pci/snps,dw- 5 Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml.
6 6
7 Properties of the host controller node that di 7 Properties of the host controller node that differ from it are:
8 8
9 - compatible: 9 - compatible:
10 Usage: required 10 Usage: required
11 Value type: <stringlist> 11 Value type: <stringlist>
12 Definition: Value should contain 12 Definition: Value should contain
13 - "amazon,al-alpine-v2 13 - "amazon,al-alpine-v2-pcie" for alpine_v2
14 - "amazon,al-alpine-v3 14 - "amazon,al-alpine-v3-pcie" for alpine_v3
15 15
16 - reg: 16 - reg:
17 Usage: required 17 Usage: required
18 Value type: <prop-encoded-array> 18 Value type: <prop-encoded-array>
19 Definition: Register ranges as listed 19 Definition: Register ranges as listed in the reg-names property
20 20
21 - reg-names: 21 - reg-names:
22 Usage: required 22 Usage: required
23 Value type: <stringlist> 23 Value type: <stringlist>
24 Definition: Must include the following 24 Definition: Must include the following entries
25 - "config" PCIe E 25 - "config" PCIe ECAM space
26 - "controller" AL pro 26 - "controller" AL proprietary registers
27 - "dbi" Design 27 - "dbi" Designware PCIe registers
28 28
29 Example: 29 Example:
30 30
31 pcie-external0: pcie@fb600000 { 31 pcie-external0: pcie@fb600000 {
32 compatible = "amazon,al-alpine 32 compatible = "amazon,al-alpine-v3-pcie";
33 reg = <0x0 0xfb600000 0x0 0x00 33 reg = <0x0 0xfb600000 0x0 0x00100000
34 0x0 0xfd800000 0x0 0x00 34 0x0 0xfd800000 0x0 0x00010000
35 0x0 0xfd810000 0x0 0x00 35 0x0 0xfd810000 0x0 0x00001000>;
36 reg-names = "config", "control 36 reg-names = "config", "controller", "dbi";
37 bus-range = <0 255>; 37 bus-range = <0 255>;
38 device_type = "pci"; 38 device_type = "pci";
39 #address-cells = <3>; 39 #address-cells = <3>;
40 #size-cells = <2>; 40 #size-cells = <2>;
41 #interrupt-cells = <1>; 41 #interrupt-cells = <1>;
42 interrupts = <GIC_SPI 49 IRQ_T 42 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
43 interrupt-map-mask = <0x00 0 0 43 interrupt-map-mask = <0x00 0 0 7>;
44 interrupt-map = <0x0000 0 0 1 44 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; /* INTa */
45 ranges = <0x02000000 0x0 0xc00 45 ranges = <0x02000000 0x0 0xc0010000 0x0 0xc0010000 0x0 0x07ff0000>;
46 }; 46 };
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