1 # SPDX-License-Identifier: (GPL-2.0-only OR BS 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2020 Renesas Electronics Corp. 2 # Copyright (C) 2020 Renesas Electronics Corp.
3 %YAML 1.2 3 %YAML 1.2
4 --- 4 ---
5 $id: http://devicetree.org/schemas/pci/rcar-pc 5 $id: http://devicetree.org/schemas/pci/rcar-pci-host.yaml#
6 $schema: http://devicetree.org/meta-schemas/co 6 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 7
8 title: Renesas R-Car PCIe Host 8 title: Renesas R-Car PCIe Host
9 9
10 maintainers: 10 maintainers:
11 - Marek Vasut <marek.vasut+renesas@gmail.com> 11 - Marek Vasut <marek.vasut+renesas@gmail.com>
12 - Yoshihiro Shimoda <yoshihiro.shimoda.uh@ren 12 - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
13 13
14 allOf: 14 allOf:
15 - $ref: /schemas/pci/pci-host-bridge.yaml# !! 15 - $ref: pci-bus.yaml#
16 16
17 properties: 17 properties:
18 compatible: 18 compatible:
19 oneOf: 19 oneOf:
20 - const: renesas,pcie-r8a7779 # R- 20 - const: renesas,pcie-r8a7779 # R-Car H1
21 - items: 21 - items:
22 - enum: 22 - enum:
23 - renesas,pcie-r8a7742 # RZ 23 - renesas,pcie-r8a7742 # RZ/G1H
24 - renesas,pcie-r8a7743 # RZ 24 - renesas,pcie-r8a7743 # RZ/G1M
25 - renesas,pcie-r8a7744 # RZ 25 - renesas,pcie-r8a7744 # RZ/G1N
26 - renesas,pcie-r8a7790 # R- 26 - renesas,pcie-r8a7790 # R-Car H2
27 - renesas,pcie-r8a7791 # R- 27 - renesas,pcie-r8a7791 # R-Car M2-W
28 - renesas,pcie-r8a7793 # R- 28 - renesas,pcie-r8a7793 # R-Car M2-N
29 - const: renesas,pcie-rcar-gen2 # R- 29 - const: renesas,pcie-rcar-gen2 # R-Car Gen2 and RZ/G1
30 - items: 30 - items:
31 - enum: 31 - enum:
32 - renesas,pcie-r8a774a1 # RZ 32 - renesas,pcie-r8a774a1 # RZ/G2M
33 - renesas,pcie-r8a774b1 # RZ 33 - renesas,pcie-r8a774b1 # RZ/G2N
34 - renesas,pcie-r8a774c0 # RZ 34 - renesas,pcie-r8a774c0 # RZ/G2E
35 - renesas,pcie-r8a774e1 # RZ 35 - renesas,pcie-r8a774e1 # RZ/G2H
36 - renesas,pcie-r8a7795 # R- 36 - renesas,pcie-r8a7795 # R-Car H3
37 - renesas,pcie-r8a7796 # R- 37 - renesas,pcie-r8a7796 # R-Car M3-W
38 - renesas,pcie-r8a77961 # R- 38 - renesas,pcie-r8a77961 # R-Car M3-W+
39 - renesas,pcie-r8a77965 # R- 39 - renesas,pcie-r8a77965 # R-Car M3-N
40 - renesas,pcie-r8a77980 # R- 40 - renesas,pcie-r8a77980 # R-Car V3H
41 - renesas,pcie-r8a77990 # R- 41 - renesas,pcie-r8a77990 # R-Car E3
42 - const: renesas,pcie-rcar-gen3 # R- 42 - const: renesas,pcie-rcar-gen3 # R-Car Gen3 and RZ/G2
43 43
44 reg: 44 reg:
45 maxItems: 1 45 maxItems: 1
46 46
47 interrupts: 47 interrupts:
48 minItems: 3 48 minItems: 3
49 maxItems: 3 49 maxItems: 3
50 50
51 clocks: 51 clocks:
52 maxItems: 2 52 maxItems: 2
53 53
54 clock-names: 54 clock-names:
55 items: 55 items:
56 - const: pcie 56 - const: pcie
57 - const: pcie_bus 57 - const: pcie_bus
58 58
59 power-domains: 59 power-domains:
60 maxItems: 1 60 maxItems: 1
61 61
62 resets: 62 resets:
63 maxItems: 1 63 maxItems: 1
64 64
65 phys: 65 phys:
66 maxItems: 1 66 maxItems: 1
67 67
68 phy-names: 68 phy-names:
69 const: pcie 69 const: pcie
70 70
71 vpcie1v5-supply: 71 vpcie1v5-supply:
72 description: The 1.5v regulator to use for 72 description: The 1.5v regulator to use for PCIe.
73 73
74 vpcie3v3-supply: 74 vpcie3v3-supply:
75 description: The 3.3v regulator to use for 75 description: The 3.3v regulator to use for PCIe.
76 76
77 vpcie12v-supply: 77 vpcie12v-supply:
78 description: The 12v regulator to use for 78 description: The 12v regulator to use for PCIe.
79 79
80 iommu-map: true 80 iommu-map: true
81 iommu-map-mask: true 81 iommu-map-mask: true
82 82
83 required: 83 required:
84 - compatible 84 - compatible
85 - reg 85 - reg
86 - interrupts 86 - interrupts
87 - clocks 87 - clocks
88 - clock-names 88 - clock-names
89 - power-domains 89 - power-domains
90 90
91 if: 91 if:
92 not: 92 not:
93 properties: 93 properties:
94 compatible: 94 compatible:
95 contains: 95 contains:
96 const: renesas,pcie-r8a7779 96 const: renesas,pcie-r8a7779
97 then: 97 then:
98 required: 98 required:
99 - resets 99 - resets
100 100
101 unevaluatedProperties: false 101 unevaluatedProperties: false
102 102
103 examples: 103 examples:
104 - | 104 - |
105 #include <dt-bindings/clock/r8a7791-cpg-ms 105 #include <dt-bindings/clock/r8a7791-cpg-mssr.h>
106 #include <dt-bindings/interrupt-controller 106 #include <dt-bindings/interrupt-controller/arm-gic.h>
107 #include <dt-bindings/power/r8a7791-sysc.h 107 #include <dt-bindings/power/r8a7791-sysc.h>
108 108
109 soc { 109 soc {
110 #address-cells = <2>; 110 #address-cells = <2>;
111 #size-cells = <2>; 111 #size-cells = <2>;
112 112
113 pcie: pcie@fe000000 { 113 pcie: pcie@fe000000 {
114 compatible = "renesas,pcie-r8a7791 114 compatible = "renesas,pcie-r8a7791", "renesas,pcie-rcar-gen2";
115 reg = <0 0xfe000000 0 0x80000>; 115 reg = <0 0xfe000000 0 0x80000>;
116 #address-cells = <3>; 116 #address-cells = <3>;
117 #size-cells = <2>; 117 #size-cells = <2>;
118 bus-range = <0x00 0xff>; 118 bus-range = <0x00 0xff>;
119 device_type = "pci"; 119 device_type = "pci";
120 ranges = <0x01000000 0 0x00000000 120 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
121 <0x02000000 0 0xfe200000 121 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
122 <0x02000000 0 0x30000000 122 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
123 <0x42000000 0 0x38000000 123 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
124 dma-ranges = <0x42000000 0 0x4000 124 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>,
125 <0x42000000 2 0x0000 125 <0x42000000 2 0x00000000 2 0x00000000 0 0x40000000>;
126 interrupts = <GIC_SPI 116 IRQ_TYP 126 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
127 <GIC_SPI 117 IRQ_TYP 127 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
128 <GIC_SPI 118 IRQ_TYP 128 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
129 #interrupt-cells = <1>; 129 #interrupt-cells = <1>;
130 interrupt-map-mask = <0 0 0 0>; 130 interrupt-map-mask = <0 0 0 0>;
131 interrupt-map = <0 0 0 0 &gic GIC 131 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
132 clocks = <&cpg CPG_MOD 319>, <&pc 132 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
133 clock-names = "pcie", "pcie_bus"; 133 clock-names = "pcie", "pcie_bus";
134 power-domains = <&sysc R8A7791_PD 134 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
135 resets = <&cpg 319>; 135 resets = <&cpg 319>;
136 vpcie3v3-supply = <&pcie_3v3>; 136 vpcie3v3-supply = <&pcie_3v3>;
137 vpcie12v-supply = <&pcie_12v>; 137 vpcie12v-supply = <&pcie_12v>;
138 }; 138 };
139 }; 139 };
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