1 # SPDX-License-Identifier: (GPL-2.0-only OR BS 2 %YAML 1.2 3 --- 4 $id: http://devicetree.org/schemas/pci/socione 5 $schema: http://devicetree.org/meta-schemas/co 6 7 title: Socionext UniPhier PCIe endpoint contro 8 9 description: | 10 UniPhier PCIe endpoint controller is based o 11 PCI core. It shares common features with the 12 inherits common properties defined in 13 Documentation/devicetree/bindings/pci/snps,d 14 15 maintainers: 16 - Kunihiko Hayashi <hayashi.kunihiko@socionex 17 18 properties: 19 compatible: 20 enum: 21 - socionext,uniphier-pro5-pcie-ep 22 - socionext,uniphier-nx1-pcie-ep 23 24 reg: 25 minItems: 4 26 maxItems: 5 27 28 reg-names: 29 minItems: 4 30 items: 31 - const: dbi 32 - const: dbi2 33 - const: link 34 - const: addr_space 35 - const: atu 36 37 clocks: 38 minItems: 1 39 maxItems: 2 40 41 clock-names: 42 minItems: 1 43 maxItems: 2 44 45 resets: 46 minItems: 1 47 maxItems: 2 48 49 reset-names: 50 minItems: 1 51 maxItems: 2 52 53 num-ib-windows: 54 const: 16 55 56 num-ob-windows: 57 const: 16 58 59 num-lanes: true 60 61 phys: 62 maxItems: 1 63 64 phy-names: 65 const: pcie-phy 66 67 allOf: 68 - $ref: /schemas/pci/snps,dw-pcie-ep.yaml# 69 - if: 70 properties: 71 compatible: 72 contains: 73 const: socionext,uniphier-pro5-pci 74 then: 75 properties: 76 reg: 77 maxItems: 4 78 reg-names: 79 maxItems: 4 80 clocks: 81 minItems: 2 82 clock-names: 83 items: 84 - const: gio 85 - const: link 86 resets: 87 minItems: 2 88 reset-names: 89 items: 90 - const: gio 91 - const: link 92 else: 93 properties: 94 reg: 95 minItems: 5 96 reg-names: 97 minItems: 5 98 clocks: 99 maxItems: 1 100 clock-names: 101 const: link 102 resets: 103 maxItems: 1 104 reset-names: 105 const: link 106 107 required: 108 - compatible 109 - reg 110 - reg-names 111 - clocks 112 - clock-names 113 - resets 114 - reset-names 115 116 unevaluatedProperties: false 117 118 examples: 119 - | 120 pcie_ep: pcie-ep@66000000 { 121 compatible = "socionext,uniphier-pro5- 122 reg-names = "dbi", "dbi2", "link", "ad 123 reg = <0x66000000 0x1000>, <0x66001000 124 <0x66010000 0x10000>, <0x6700000 125 clock-names = "gio", "link"; 126 clocks = <&sys_clk 12>, <&sys_clk 24>; 127 reset-names = "gio", "link"; 128 resets = <&sys_rst 12>, <&sys_rst 24>; 129 num-ib-windows = <16>; 130 num-ob-windows = <16>; 131 num-lanes = <4>; 132 phy-names = "pcie-phy"; 133 phys = <&pcie_phy>; 134 };
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