1 # SPDX-License-Identifier: (GPL-2.0-only OR BS 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 %YAML 1.2 2 %YAML 1.2 3 --- 3 --- 4 $id: http://devicetree.org/schemas/pci/socione 4 $id: http://devicetree.org/schemas/pci/socionext,uniphier-pcie-ep.yaml# 5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 6 6 7 title: Socionext UniPhier PCIe endpoint contro 7 title: Socionext UniPhier PCIe endpoint controller 8 8 9 description: | 9 description: | 10 UniPhier PCIe endpoint controller is based o 10 UniPhier PCIe endpoint controller is based on the Synopsys DesignWare 11 PCI core. It shares common features with the 11 PCI core. It shares common features with the PCIe DesignWare core and 12 inherits common properties defined in 12 inherits common properties defined in 13 Documentation/devicetree/bindings/pci/snps,d 13 Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml. 14 14 15 maintainers: 15 maintainers: 16 - Kunihiko Hayashi <hayashi.kunihiko@socionex 16 - Kunihiko Hayashi <hayashi.kunihiko@socionext.com> 17 17 18 properties: 18 properties: 19 compatible: 19 compatible: 20 enum: 20 enum: 21 - socionext,uniphier-pro5-pcie-ep 21 - socionext,uniphier-pro5-pcie-ep 22 - socionext,uniphier-nx1-pcie-ep 22 - socionext,uniphier-nx1-pcie-ep 23 23 24 reg: 24 reg: 25 minItems: 4 25 minItems: 4 26 maxItems: 5 26 maxItems: 5 27 27 28 reg-names: 28 reg-names: 29 minItems: 4 29 minItems: 4 30 items: 30 items: 31 - const: dbi 31 - const: dbi 32 - const: dbi2 32 - const: dbi2 33 - const: link 33 - const: link 34 - const: addr_space 34 - const: addr_space 35 - const: atu 35 - const: atu 36 36 37 clocks: 37 clocks: 38 minItems: 1 38 minItems: 1 39 maxItems: 2 39 maxItems: 2 40 40 41 clock-names: !! 41 clock-names: true 42 minItems: 1 << 43 maxItems: 2 << 44 42 45 resets: 43 resets: 46 minItems: 1 44 minItems: 1 47 maxItems: 2 45 maxItems: 2 48 46 49 reset-names: !! 47 reset-names: true 50 minItems: 1 << 51 maxItems: 2 << 52 48 53 num-ib-windows: 49 num-ib-windows: 54 const: 16 50 const: 16 55 51 56 num-ob-windows: 52 num-ob-windows: 57 const: 16 53 const: 16 58 54 59 num-lanes: true 55 num-lanes: true 60 56 61 phys: 57 phys: 62 maxItems: 1 58 maxItems: 1 63 59 64 phy-names: 60 phy-names: 65 const: pcie-phy 61 const: pcie-phy 66 62 67 allOf: 63 allOf: 68 - $ref: /schemas/pci/snps,dw-pcie-ep.yaml# 64 - $ref: /schemas/pci/snps,dw-pcie-ep.yaml# 69 - if: 65 - if: 70 properties: 66 properties: 71 compatible: 67 compatible: 72 contains: 68 contains: 73 const: socionext,uniphier-pro5-pci 69 const: socionext,uniphier-pro5-pcie-ep 74 then: 70 then: 75 properties: 71 properties: 76 reg: 72 reg: 77 maxItems: 4 73 maxItems: 4 78 reg-names: 74 reg-names: 79 maxItems: 4 75 maxItems: 4 80 clocks: 76 clocks: 81 minItems: 2 77 minItems: 2 82 clock-names: 78 clock-names: 83 items: 79 items: 84 - const: gio 80 - const: gio 85 - const: link 81 - const: link 86 resets: 82 resets: 87 minItems: 2 83 minItems: 2 88 reset-names: 84 reset-names: 89 items: 85 items: 90 - const: gio 86 - const: gio 91 - const: link 87 - const: link 92 else: 88 else: 93 properties: 89 properties: 94 reg: 90 reg: 95 minItems: 5 91 minItems: 5 96 reg-names: 92 reg-names: 97 minItems: 5 93 minItems: 5 98 clocks: 94 clocks: 99 maxItems: 1 95 maxItems: 1 100 clock-names: 96 clock-names: 101 const: link 97 const: link 102 resets: 98 resets: 103 maxItems: 1 99 maxItems: 1 104 reset-names: 100 reset-names: 105 const: link 101 const: link 106 102 107 required: 103 required: 108 - compatible 104 - compatible 109 - reg 105 - reg 110 - reg-names 106 - reg-names 111 - clocks 107 - clocks 112 - clock-names 108 - clock-names 113 - resets 109 - resets 114 - reset-names 110 - reset-names 115 111 116 unevaluatedProperties: false 112 unevaluatedProperties: false 117 113 118 examples: 114 examples: 119 - | 115 - | 120 pcie_ep: pcie-ep@66000000 { 116 pcie_ep: pcie-ep@66000000 { 121 compatible = "socionext,uniphier-pro5- 117 compatible = "socionext,uniphier-pro5-pcie-ep"; 122 reg-names = "dbi", "dbi2", "link", "ad 118 reg-names = "dbi", "dbi2", "link", "addr_space"; 123 reg = <0x66000000 0x1000>, <0x66001000 119 reg = <0x66000000 0x1000>, <0x66001000 0x1000>, 124 <0x66010000 0x10000>, <0x6700000 120 <0x66010000 0x10000>, <0x67000000 0x400000>; 125 clock-names = "gio", "link"; 121 clock-names = "gio", "link"; 126 clocks = <&sys_clk 12>, <&sys_clk 24>; 122 clocks = <&sys_clk 12>, <&sys_clk 24>; 127 reset-names = "gio", "link"; 123 reset-names = "gio", "link"; 128 resets = <&sys_rst 12>, <&sys_rst 24>; 124 resets = <&sys_rst 12>, <&sys_rst 24>; 129 num-ib-windows = <16>; 125 num-ib-windows = <16>; 130 num-ob-windows = <16>; 126 num-ob-windows = <16>; 131 num-lanes = <4>; 127 num-lanes = <4>; 132 phy-names = "pcie-phy"; 128 phy-names = "pcie-phy"; 133 phys = <&pcie_phy>; 129 phys = <&pcie_phy>; 134 }; 130 };
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