1 # SPDX-License-Identifier: (GPL-2.0-only OR BS 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/perf/amlogi 4 $id: http://devicetree.org/schemas/perf/amlogic,g12-ddr-pmu.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: Amlogic G12 DDR performance monitor 7 title: Amlogic G12 DDR performance monitor
8 8
9 maintainers: 9 maintainers:
10 - Jiucheng Xu <jiucheng.xu@amlogic.com> 10 - Jiucheng Xu <jiucheng.xu@amlogic.com>
11 11
12 description: | 12 description: |
13 Amlogic G12 series SoC integrate DDR bandwid 13 Amlogic G12 series SoC integrate DDR bandwidth monitor.
14 A timer is inside and can generate interrupt 14 A timer is inside and can generate interrupt when timeout.
15 The bandwidth is counted in the timer ISR. D 15 The bandwidth is counted in the timer ISR. Different platform
16 has different subset of event format attribu 16 has different subset of event format attribute.
17 17
18 properties: 18 properties:
19 compatible: 19 compatible:
20 enum: 20 enum:
21 - amlogic,g12a-ddr-pmu 21 - amlogic,g12a-ddr-pmu
22 - amlogic,g12b-ddr-pmu 22 - amlogic,g12b-ddr-pmu
23 - amlogic,sm1-ddr-pmu 23 - amlogic,sm1-ddr-pmu
24 24
25 reg: 25 reg:
26 items: 26 items:
27 - description: DMC bandwidth register sp 27 - description: DMC bandwidth register space.
28 - description: DMC PLL register space. 28 - description: DMC PLL register space.
29 29
30 interrupts: 30 interrupts:
31 items: 31 items:
32 - description: The IRQ of the inside tim 32 - description: The IRQ of the inside timer timeout.
33 33
34 required: 34 required:
35 - compatible 35 - compatible
36 - reg 36 - reg
37 - interrupts 37 - interrupts
38 38
39 additionalProperties: false 39 additionalProperties: false
40 40
41 examples: 41 examples:
42 - | 42 - |
43 #include <dt-bindings/interrupt-controller 43 #include <dt-bindings/interrupt-controller/arm-gic.h>
44 pmu { 44 pmu {
45 #address-cells = <2>; 45 #address-cells = <2>;
46 #size-cells = <2>; 46 #size-cells = <2>;
47 47
48 pmu@ff638000 { 48 pmu@ff638000 {
49 compatible = "amlogic,g12a-ddr-pmu 49 compatible = "amlogic,g12a-ddr-pmu";
50 reg = <0x0 0xff638000 0x0 0x100>, 50 reg = <0x0 0xff638000 0x0 0x100>,
51 <0x0 0xff638c00 0x0 0x100>; 51 <0x0 0xff638c00 0x0 0x100>;
52 interrupts = <GIC_SPI 52 IRQ_TYPE_ 52 interrupts = <GIC_SPI 52 IRQ_TYPE_EDGE_RISING>;
53 }; 53 };
54 }; 54 };
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