1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-C 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2 # Copyright 2019 BayLibre, SAS 2 # Copyright 2019 BayLibre, SAS
3 %YAML 1.2 3 %YAML 1.2
4 --- 4 ---
5 $id: http://devicetree.org/schemas/phy/amlogic 5 $id: http://devicetree.org/schemas/phy/amlogic,g12a-usb3-pcie-phy.yaml#
6 $schema: http://devicetree.org/meta-schemas/co 6 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 7
8 title: Amlogic G12A USB3 + PCIE Combo PHY 8 title: Amlogic G12A USB3 + PCIE Combo PHY
9 9
10 maintainers: 10 maintainers:
11 - Neil Armstrong <neil.armstrong@linaro.org> 11 - Neil Armstrong <neil.armstrong@linaro.org>
12 12
13 properties: 13 properties:
14 compatible: 14 compatible:
15 enum: 15 enum:
16 - amlogic,g12a-usb3-pcie-phy 16 - amlogic,g12a-usb3-pcie-phy
17 17
18 reg: 18 reg:
19 maxItems: 1 19 maxItems: 1
20 20
21 clocks: 21 clocks:
22 maxItems: 1 22 maxItems: 1
23 23
24 clock-names: 24 clock-names:
25 items: 25 items:
26 - const: ref_clk 26 - const: ref_clk
27 27
28 resets: 28 resets:
29 maxItems: 1 29 maxItems: 1
30 30
31 reset-names: 31 reset-names:
32 items: 32 items:
33 - const: phy 33 - const: phy
34 34
35 "#phy-cells": 35 "#phy-cells":
36 const: 1 36 const: 1
37 37
38 phy-supply: 38 phy-supply:
39 description: 39 description:
40 Phandle to a regulator that provides pow 40 Phandle to a regulator that provides power to the PHY. This
41 regulator will be managed during the PHY 41 regulator will be managed during the PHY power on/off sequence.
42 42
43 required: 43 required:
44 - compatible 44 - compatible
45 - reg 45 - reg
46 - clocks 46 - clocks
47 - clock-names 47 - clock-names
48 - resets 48 - resets
49 - reset-names 49 - reset-names
50 - "#phy-cells" 50 - "#phy-cells"
51 51
52 additionalProperties: false 52 additionalProperties: false
53 53
54 examples: 54 examples:
55 - | 55 - |
56 phy@46000 { 56 phy@46000 {
57 compatible = "amlogic,g12a-usb3-pcie 57 compatible = "amlogic,g12a-usb3-pcie-phy";
58 reg = <0x46000 0x2000>; 58 reg = <0x46000 0x2000>;
59 clocks = <&ref_clk>; 59 clocks = <&ref_clk>;
60 clock-names = "ref_clk"; 60 clock-names = "ref_clk";
61 resets = <&phy_reset>; 61 resets = <&phy_reset>;
62 reset-names = "phy"; 62 reset-names = "phy";
63 #phy-cells = <1>; 63 #phy-cells = <1>;
64 }; 64 };
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