1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-C 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2 %YAML 1.2 2 %YAML 1.2 3 --- 3 --- 4 $id: http://devicetree.org/schemas/phy/phy-cad !! 4 $id: "http://devicetree.org/schemas/phy/phy-cadence-torrent.yaml#" 5 $schema: http://devicetree.org/meta-schemas/co !! 5 $schema: "http://devicetree.org/meta-schemas/core.yaml#" 6 6 7 title: Cadence Torrent SD0801 PHY !! 7 title: Cadence Torrent SD0801 PHY binding 8 8 9 description: 9 description: 10 This binding describes the Cadence SD0801 PH 10 This binding describes the Cadence SD0801 PHY (also known as Torrent PHY) 11 hardware included with the Cadence MHDP Disp 11 hardware included with the Cadence MHDP DisplayPort controller. Torrent 12 PHY also supports multilink multiprotocol co 12 PHY also supports multilink multiprotocol combinations including protocols 13 such as PCIe, USB, SGMII, QSGMII etc. 13 such as PCIe, USB, SGMII, QSGMII etc. 14 14 15 maintainers: 15 maintainers: 16 - Swapnil Jakhade <sjakhade@cadence.com> 16 - Swapnil Jakhade <sjakhade@cadence.com> 17 - Yuti Amonkar <yamonkar@cadence.com> 17 - Yuti Amonkar <yamonkar@cadence.com> 18 18 19 properties: 19 properties: 20 compatible: 20 compatible: 21 enum: 21 enum: 22 - cdns,torrent-phy 22 - cdns,torrent-phy 23 - ti,j7200-serdes-10g << 24 - ti,j721e-serdes-10g 23 - ti,j721e-serdes-10g 25 24 26 '#address-cells': 25 '#address-cells': 27 const: 1 26 const: 1 28 27 29 '#size-cells': 28 '#size-cells': 30 const: 0 29 const: 0 31 30 32 '#clock-cells': << 33 const: 1 << 34 << 35 clocks: 31 clocks: 36 minItems: 1 !! 32 maxItems: 1 37 maxItems: 2 << 38 description: 33 description: 39 PHY input reference clocks - refclk (for !! 34 PHY reference clock. Must contain an entry in clock-names. 40 pll1_refclk is optional and used for mul << 41 separate reference clock for each protoc << 42 Same refclk is used for both PLL0 and PL << 43 Optional parent clock (phy_en_refclk) to << 44 on some platforms to output either deriv << 45 35 46 clock-names: 36 clock-names: 47 minItems: 1 !! 37 const: refclk 48 items: << 49 - const: refclk << 50 - enum: [ pll1_refclk, phy_en_refclk ] << 51 38 52 reg: 39 reg: 53 minItems: 1 40 minItems: 1 >> 41 maxItems: 2 54 items: 42 items: 55 - description: Offset of the Torrent PHY 43 - description: Offset of the Torrent PHY configuration registers. 56 - description: Offset of the DPTX PHY co 44 - description: Offset of the DPTX PHY configuration registers. 57 45 58 reg-names: 46 reg-names: 59 minItems: 1 47 minItems: 1 >> 48 maxItems: 2 60 items: 49 items: 61 - const: torrent_phy 50 - const: torrent_phy 62 - const: dptx_phy 51 - const: dptx_phy 63 52 64 resets: 53 resets: 65 minItems: 1 54 minItems: 1 >> 55 maxItems: 2 66 items: 56 items: 67 - description: Torrent PHY reset. 57 - description: Torrent PHY reset. 68 - description: Torrent APB reset. This i 58 - description: Torrent APB reset. This is optional. 69 59 70 reset-names: 60 reset-names: 71 minItems: 1 61 minItems: 1 >> 62 maxItems: 2 72 items: 63 items: 73 - const: torrent_reset 64 - const: torrent_reset 74 - const: torrent_apb 65 - const: torrent_apb 75 66 76 patternProperties: 67 patternProperties: 77 '^phy@[0-3]$': 68 '^phy@[0-3]$': 78 type: object 69 type: object 79 description: 70 description: 80 Each group of PHY lanes with a single ma 71 Each group of PHY lanes with a single master lane should be represented as a sub-node. 81 properties: 72 properties: 82 reg: 73 reg: 83 description: 74 description: 84 The master lane number. This is the 75 The master lane number. This is the lowest numbered lane in the lane group. 85 minimum: 0 76 minimum: 0 86 maximum: 3 77 maximum: 3 87 78 88 resets: 79 resets: 89 minItems: 1 80 minItems: 1 90 maxItems: 4 81 maxItems: 4 91 description: 82 description: 92 Contains list of resets, one per lan 83 Contains list of resets, one per lane, to get all the link lanes out of reset. 93 84 94 "#phy-cells": 85 "#phy-cells": 95 const: 0 86 const: 0 96 87 97 cdns,phy-type: 88 cdns,phy-type: 98 description: 89 description: 99 Specifies the type of PHY for which 90 Specifies the type of PHY for which the group of PHY lanes is used. 100 Refer include/dt-bindings/phy/phy.h. 91 Refer include/dt-bindings/phy/phy.h. Constants from the header should be used. 101 $ref: /schemas/types.yaml#/definitions 92 $ref: /schemas/types.yaml#/definitions/uint32 102 minimum: 1 93 minimum: 1 103 maximum: 9 94 maximum: 9 104 95 105 cdns,num-lanes: 96 cdns,num-lanes: 106 description: 97 description: 107 Number of lanes. 98 Number of lanes. 108 $ref: /schemas/types.yaml#/definitions 99 $ref: /schemas/types.yaml#/definitions/uint32 109 enum: [1, 2, 3, 4] 100 enum: [1, 2, 3, 4] 110 default: 4 101 default: 4 111 102 112 cdns,ssc-mode: 103 cdns,ssc-mode: 113 description: 104 description: 114 Specifies the Spread Spectrum Clocki 105 Specifies the Spread Spectrum Clocking mode used. It can be NO_SSC, 115 EXTERNAL_SSC or INTERNAL_SSC. 106 EXTERNAL_SSC or INTERNAL_SSC. 116 Refer include/dt-bindings/phy/phy-ca !! 107 Refer include/dt-bindings/phy/phy-cadence-torrent.h for the constants to be used. 117 $ref: /schemas/types.yaml#/definitions 108 $ref: /schemas/types.yaml#/definitions/uint32 118 enum: [0, 1, 2] 109 enum: [0, 1, 2] 119 default: 0 110 default: 0 120 111 121 cdns,max-bit-rate: 112 cdns,max-bit-rate: 122 description: 113 description: 123 Maximum DisplayPort link bit rate to 114 Maximum DisplayPort link bit rate to use, in Mbps 124 $ref: /schemas/types.yaml#/definitions 115 $ref: /schemas/types.yaml#/definitions/uint32 125 enum: [2160, 2430, 2700, 3240, 4320, 5 116 enum: [2160, 2430, 2700, 3240, 4320, 5400, 8100] 126 default: 8100 117 default: 8100 127 118 128 required: 119 required: 129 - reg 120 - reg 130 - resets 121 - resets 131 - "#phy-cells" 122 - "#phy-cells" 132 - cdns,phy-type 123 - cdns,phy-type 133 - cdns,num-lanes 124 - cdns,num-lanes 134 125 135 additionalProperties: false 126 additionalProperties: false 136 127 137 required: 128 required: 138 - compatible 129 - compatible 139 - "#address-cells" 130 - "#address-cells" 140 - "#size-cells" 131 - "#size-cells" 141 - clocks 132 - clocks 142 - clock-names 133 - clock-names 143 - reg 134 - reg 144 - reg-names 135 - reg-names 145 - resets 136 - resets 146 - reset-names 137 - reset-names 147 138 148 additionalProperties: false 139 additionalProperties: false 149 140 150 examples: 141 examples: 151 - | 142 - | 152 #include <dt-bindings/phy/phy.h> 143 #include <dt-bindings/phy/phy.h> 153 144 154 bus { 145 bus { 155 #address-cells = <2>; 146 #address-cells = <2>; 156 #size-cells = <2>; 147 #size-cells = <2>; 157 148 158 torrent-phy@f0fb500000 { 149 torrent-phy@f0fb500000 { 159 compatible = "cdns,torrent-phy"; 150 compatible = "cdns,torrent-phy"; 160 reg = <0xf0 0xfb500000 0x0 0x00100 151 reg = <0xf0 0xfb500000 0x0 0x00100000>, 161 <0xf0 0xfb030a00 0x0 0x00000 152 <0xf0 0xfb030a00 0x0 0x00000040>; 162 reg-names = "torrent_phy", "dptx_p 153 reg-names = "torrent_phy", "dptx_phy"; 163 resets = <&phyrst 0>; 154 resets = <&phyrst 0>; 164 reset-names = "torrent_reset"; 155 reset-names = "torrent_reset"; 165 clocks = <&ref_clk>; 156 clocks = <&ref_clk>; 166 clock-names = "refclk"; 157 clock-names = "refclk"; 167 #address-cells = <1>; 158 #address-cells = <1>; 168 #size-cells = <0>; 159 #size-cells = <0>; 169 phy@0 { 160 phy@0 { 170 reg = <0>; 161 reg = <0>; 171 resets = <&phyrst 1>, <&phyrst 162 resets = <&phyrst 1>, <&phyrst 2>, 172 <&phyrst 3>, <&phyrst 163 <&phyrst 3>, <&phyrst 4>; 173 #phy-cells = <0>; 164 #phy-cells = <0>; 174 cdns,phy-type = <PHY_TYPE_DP>; 165 cdns,phy-type = <PHY_TYPE_DP>; 175 cdns,num-lanes = <4>; 166 cdns,num-lanes = <4>; 176 cdns,max-bit-rate = <8100>; 167 cdns,max-bit-rate = <8100>; 177 }; 168 }; 178 }; 169 }; 179 }; 170 }; 180 - | 171 - | 181 #include <dt-bindings/phy/phy.h> 172 #include <dt-bindings/phy/phy.h> 182 #include <dt-bindings/phy/phy-cadence.h> !! 173 #include <dt-bindings/phy/phy-cadence-torrent.h> 183 174 184 bus { 175 bus { 185 #address-cells = <2>; 176 #address-cells = <2>; 186 #size-cells = <2>; 177 #size-cells = <2>; 187 178 188 torrent-phy@f0fb500000 { 179 torrent-phy@f0fb500000 { 189 compatible = "cdns,torrent-phy"; 180 compatible = "cdns,torrent-phy"; 190 reg = <0xf0 0xfb500000 0x0 0x00100 181 reg = <0xf0 0xfb500000 0x0 0x00100000>; 191 reg-names = "torrent_phy"; 182 reg-names = "torrent_phy"; 192 resets = <&phyrst 0>, <&phyrst 1>; 183 resets = <&phyrst 0>, <&phyrst 1>; 193 reset-names = "torrent_reset", "to 184 reset-names = "torrent_reset", "torrent_apb"; 194 clocks = <&ref_clk>; 185 clocks = <&ref_clk>; 195 clock-names = "refclk"; 186 clock-names = "refclk"; 196 #address-cells = <1>; 187 #address-cells = <1>; 197 #size-cells = <0>; 188 #size-cells = <0>; 198 phy@0 { 189 phy@0 { 199 reg = <0>; 190 reg = <0>; 200 resets = <&phyrst 2>, <&phyrst 191 resets = <&phyrst 2>, <&phyrst 3>; 201 #phy-cells = <0>; 192 #phy-cells = <0>; 202 cdns,phy-type = <PHY_TYPE_PCIE 193 cdns,phy-type = <PHY_TYPE_PCIE>; 203 cdns,num-lanes = <2>; 194 cdns,num-lanes = <2>; 204 cdns,ssc-mode = <CDNS_SERDES_N !! 195 cdns,ssc-mode = <TORRENT_SERDES_NO_SSC>; 205 }; 196 }; 206 197 207 phy@2 { 198 phy@2 { 208 reg = <2>; 199 reg = <2>; 209 resets = <&phyrst 4>; 200 resets = <&phyrst 4>; 210 #phy-cells = <0>; 201 #phy-cells = <0>; 211 cdns,phy-type = <PHY_TYPE_SGMI 202 cdns,phy-type = <PHY_TYPE_SGMII>; 212 cdns,num-lanes = <1>; 203 cdns,num-lanes = <1>; 213 cdns,ssc-mode = <CDNS_SERDES_N !! 204 cdns,ssc-mode = <TORRENT_SERDES_NO_SSC>; 214 }; 205 }; 215 }; 206 }; 216 }; 207 }; 217 ... 208 ...
Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.