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Linux/Documentation/devicetree/bindings/phy/phy-lantiq-rcu-usb2.txt

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Diff markup

Differences between /Documentation/devicetree/bindings/phy/phy-lantiq-rcu-usb2.txt (Version linux-6.12-rc7) and /Documentation/devicetree/bindings/phy/phy-lantiq-rcu-usb2.txt (Version linux-2.4.37.11)


  1 Lantiq XWAY SoC RCU USB 1.1/2.0 PHY binding       
  2 ===========================================       
  3                                                   
  4 This binding describes the USB PHY hardware pr    
  5 Lantiq XWAY SoCs.                                 
  6                                                   
  7 This node has to be a sub node of the Lantiq R    
  8                                                   
  9 ----------------------------------------------    
 10 Required properties (controller (parent) node)    
 11 - compatible    : Should be one of                
 12                         "lantiq,ase-usb2-phy"     
 13                         "lantiq,danube-usb2-ph    
 14                         "lantiq,xrx100-usb2-ph    
 15                         "lantiq,xrx200-usb2-ph    
 16                         "lantiq,xrx300-usb2-ph    
 17 - reg           : Defines the following sets o    
 18                   syscon device                   
 19                         - Offset of the USB PH    
 20                         - Offset of the USB An    
 21                           register (only for x    
 22 - clocks        : References to the (PMU) "phy    
 23 - clock-names   : Must be "phy"                   
 24 - resets        : References to the RCU USB co    
 25 - reset-names   : Must be one of the following    
 26                         "phy" (optional)          
 27                         "ctrl" (shared)           
 28                                                   
 29 ----------------------------------------------    
 30 Example for the USB PHYs on an xRX200 SoC:        
 31         usb_phy0: usb2-phy@18 {                   
 32                 compatible = "lantiq,xrx200-us    
 33                 reg = <0x18 4>, <0x38 4>;         
 34                                                   
 35                 clocks = <&pmu PMU_GATE_USB0_P    
 36                 clock-names = "phy";              
 37                 resets = <&reset1 4 4>, <&rese    
 38                 reset-names = "phy", "ctrl";      
 39                 #phy-cells = <0>;                 
 40         };                                        
                                                      

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