1 STMicroelectronics STi MIPHY28LP PHY binding
2 ============================================
3
4 This binding describes a miphy device that is
5 for SATA, PCIe or USB3.
6
7 Required properties (controller (parent) node)
8 - compatible : Should be "st,miphy28lp-phy"
9 - st,syscfg : Should be a phandle of the s
10 which contain the SATA, PCIe
11
12 Required nodes : A sub-node is required for
13 provides. Address range inf
14 'reg' and 'reg-names' prope
15 nodes to describe the contr
16 are translated by the drive
17
18 Required properties (port (child) node):
19 - #phy-cells : Should be 1 (See second exam
20 Cell after port phandle is d
21 - PHY_TYPE_SATA
22 - PHY_TYPE_PCI
23 - PHY_TYPE_USB3
24 - reg : Address and length of the re
25 - reg-names : The names of the register ad
26 filled in "reg". It can also
27 registers used as glue-logic
28 devices.
29 - st,syscfg : Offset of the parent configu
30 - resets : phandle to the parent reset
31 - reset-names : Associated name must be "mip
32
33 Optional properties (port (child) node):
34 - st,osc-rdy : to check the MIPHY0_
35 is not available in
36 MiPHY0 has this bit.
37 - st,osc-force-ext : to select the extern
38 different MiPHY insi
39 - st,sata_gen : to select which SATA
40 register.
41 - st,px_rx_pol_inv : to invert polarity o
42 line).
43 - st,scc-on : enable ssc to reduce
44 - st,tx-impedance-comp : to compensate tx imp
45
46 example:
47
48 miphy28lp_phy: miphy28lp@9b220
49 compatible = "st,miphy
50 st,syscfg = <&syscfg_c
51 #address-cells = <1>;
52 #size-cells = <1>;
53 ranges;
54
55 phy_port0: port@9b2200
56 reg = <0x9b220
57 <0x9b090
58 <0x9b040
59 reg-names = "s
60 "p
61 "p
62
63 st,syscfg = <0
64 #phy-cells = <
65 st,osc-rdy;
66 reset-names =
67 resets = <&sof
68 };
69
70 phy_port1: port@9b2a00
71 reg = <0x9b2a0
72 <0x9b190
73 <0x9b140
74 reg-names = "s
75 "p
76 "p
77
78 st,syscfg = <0
79
80 #phy-cells = <
81 st,osc-force-e
82 reset-names =
83 resets = <&sof
84 };
85
86 phy_port2: port@8f9500
87 reg = <0x8f950
88 <0x8f900
89 reg-names = "p
90 "u
91
92 st,syscfg = <0
93
94 #phy-cells = <
95 reset-names =
96 resets = <&sof
97 };
98 };
99
100
101 Specifying phy control of devices
102 =================================
103
104 Device nodes should specify the configuration
105 property, containing a phandle to the miphy de
106 specifying which configuration to use, as desc
107
108 example:
109 sata0: sata@9b20000 {
110 ...
111 phys = <&ph
112 ...
113 };
114
115 Macro definitions for the supported miphy conf
116
117 include/dt-bindings/phy/phy.h
Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.