1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-C 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/phy/qcom,sn 4 $id: http://devicetree.org/schemas/phy/qcom,snps-eusb2-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: Qualcomm SNPS eUSB2 phy controller 7 title: Qualcomm SNPS eUSB2 phy controller
8 8
9 maintainers: 9 maintainers:
10 - Abel Vesa <abel.vesa@linaro.org> 10 - Abel Vesa <abel.vesa@linaro.org>
11 11
12 description: 12 description:
13 eUSB2 controller supports LS/FS/HS usb conne 13 eUSB2 controller supports LS/FS/HS usb connectivity on Qualcomm chipsets.
14 14
15 properties: 15 properties:
16 compatible: 16 compatible:
17 oneOf: 17 oneOf:
18 - items: 18 - items:
19 - enum: 19 - enum:
20 - qcom,sdx75-snps-eusb2-phy 20 - qcom,sdx75-snps-eusb2-phy
21 - qcom,sm8650-snps-eusb2-phy 21 - qcom,sm8650-snps-eusb2-phy
22 - qcom,x1e80100-snps-eusb2-phy 22 - qcom,x1e80100-snps-eusb2-phy
23 - const: qcom,sm8550-snps-eusb2-phy 23 - const: qcom,sm8550-snps-eusb2-phy
24 - const: qcom,sm8550-snps-eusb2-phy 24 - const: qcom,sm8550-snps-eusb2-phy
25 25
26 reg: 26 reg:
27 maxItems: 1 27 maxItems: 1
28 28
29 "#phy-cells": 29 "#phy-cells":
30 const: 0 30 const: 0
31 31
32 clocks: 32 clocks:
33 items: 33 items:
34 - description: ref 34 - description: ref
35 35
36 clock-names: 36 clock-names:
37 items: 37 items:
38 - const: ref 38 - const: ref
39 39
40 resets: 40 resets:
41 maxItems: 1 41 maxItems: 1
42 42
43 phys: 43 phys:
44 maxItems: 1 44 maxItems: 1
45 description: 45 description:
46 Phandle to eUSB2 to USB 2.0 repeater 46 Phandle to eUSB2 to USB 2.0 repeater
47 47
48 vdd-supply: 48 vdd-supply:
49 description: 49 description:
50 Phandle to 0.88V regulator supply to PHY 50 Phandle to 0.88V regulator supply to PHY digital circuit.
51 51
52 vdda12-supply: 52 vdda12-supply:
53 description: 53 description:
54 Phandle to 1.2V regulator supply to PHY 54 Phandle to 1.2V regulator supply to PHY refclk pll block.
55 55
56 required: 56 required:
57 - compatible 57 - compatible
58 - reg 58 - reg
59 - "#phy-cells" 59 - "#phy-cells"
60 - clocks 60 - clocks
61 - clock-names 61 - clock-names
62 - vdd-supply 62 - vdd-supply
63 - vdda12-supply 63 - vdda12-supply
64 - resets 64 - resets
65 65
66 additionalProperties: false 66 additionalProperties: false
67 67
68 examples: 68 examples:
69 - | 69 - |
70 #include <dt-bindings/clock/qcom,sm8550-gc 70 #include <dt-bindings/clock/qcom,sm8550-gcc.h>
71 #include <dt-bindings/clock/qcom,rpmh.h> 71 #include <dt-bindings/clock/qcom,rpmh.h>
72 #include <dt-bindings/clock/qcom,sm8550-tc 72 #include <dt-bindings/clock/qcom,sm8550-tcsr.h>
73 73
74 usb_1_hsphy: phy@88e3000 { 74 usb_1_hsphy: phy@88e3000 {
75 compatible = "qcom,sm8550-snps-eusb2-p 75 compatible = "qcom,sm8550-snps-eusb2-phy";
76 reg = <0x88e3000 0x154>; 76 reg = <0x88e3000 0x154>;
77 #phy-cells = <0>; 77 #phy-cells = <0>;
78 78
79 clocks = <&tcsrcc TCSR_USB2_CLKREF_EN> 79 clocks = <&tcsrcc TCSR_USB2_CLKREF_EN>;
80 clock-names = "ref"; 80 clock-names = "ref";
81 81
82 vdd-supply = <&vreg_l1e_0p88>; 82 vdd-supply = <&vreg_l1e_0p88>;
83 vdda12-supply = <&vreg_l3e_1p2>; 83 vdda12-supply = <&vreg_l3e_1p2>;
84 84
85 resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>; 85 resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>;
86 }; 86 };
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