1 # SPDX-License-Identifier: (GPL-2.0-only OR BS 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/phy/qcom,us !! 4 $id: "http://devicetree.org/schemas/phy/qcom,usb-hs-28nm.yaml#"
5 $schema: http://devicetree.org/meta-schemas/co !! 5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
6 6
7 title: Qualcomm Synopsys DesignWare Core 28nm 7 title: Qualcomm Synopsys DesignWare Core 28nm High-Speed PHY
8 8
9 maintainers: 9 maintainers:
10 - Bryan O'Donoghue <bryan.odonoghue@linaro.or 10 - Bryan O'Donoghue <bryan.odonoghue@linaro.org>
11 11
12 description: | 12 description: |
13 Qualcomm Low-Speed, Full-Speed, Hi-Speed 28n 13 Qualcomm Low-Speed, Full-Speed, Hi-Speed 28nm USB PHY
14 14
15 properties: 15 properties:
16 compatible: 16 compatible:
17 enum: 17 enum:
18 - qcom,usb-hs-28nm-femtophy 18 - qcom,usb-hs-28nm-femtophy
>> 19 - qcom,usb-hs-28nm-mdm9607
19 20
20 reg: 21 reg:
21 maxItems: 1 22 maxItems: 1
22 23
23 "#phy-cells": 24 "#phy-cells":
24 const: 0 25 const: 0
25 26
26 clocks: 27 clocks:
27 items: 28 items:
28 - description: rpmcc ref clock 29 - description: rpmcc ref clock
29 - description: PHY AHB clock 30 - description: PHY AHB clock
30 - description: Rentention clock 31 - description: Rentention clock
31 32
32 clock-names: 33 clock-names:
33 items: 34 items:
34 - const: ref 35 - const: ref
35 - const: ahb 36 - const: ahb
36 - const: sleep 37 - const: sleep
37 38
38 resets: 39 resets:
39 items: 40 items:
40 - description: PHY core reset 41 - description: PHY core reset
41 - description: POR reset 42 - description: POR reset
42 43
43 reset-names: 44 reset-names:
44 items: 45 items:
45 - const: phy 46 - const: phy
46 - const: por 47 - const: por
47 48
48 vdd-supply: 49 vdd-supply:
49 description: phandle to the regulator VDD 50 description: phandle to the regulator VDD supply node.
50 51
51 vdda1p8-supply: 52 vdda1p8-supply:
52 description: phandle to the regulator 1.8V 53 description: phandle to the regulator 1.8V supply node.
53 54
54 vdda3p3-supply: 55 vdda3p3-supply:
55 description: phandle to the regulator 3.3V 56 description: phandle to the regulator 3.3V supply node.
56 57
57 required: 58 required:
58 - compatible 59 - compatible
59 - reg 60 - reg
60 - "#phy-cells" 61 - "#phy-cells"
61 - clocks 62 - clocks
62 - clock-names 63 - clock-names
63 - resets 64 - resets
64 - reset-names 65 - reset-names
65 - vdd-supply 66 - vdd-supply
66 - vdda1p8-supply 67 - vdda1p8-supply
67 - vdda3p3-supply 68 - vdda3p3-supply
68 69
69 additionalProperties: false 70 additionalProperties: false
70 71
71 examples: 72 examples:
72 - | 73 - |
73 #include <dt-bindings/clock/qcom,gcc-qcs40 74 #include <dt-bindings/clock/qcom,gcc-qcs404.h>
74 #include <dt-bindings/clock/qcom,rpmcc.h> 75 #include <dt-bindings/clock/qcom,rpmcc.h>
75 usb2_phy_prim: phy@7a000 { 76 usb2_phy_prim: phy@7a000 {
76 compatible = "qcom,usb-hs-28nm-femtoph 77 compatible = "qcom,usb-hs-28nm-femtophy";
77 reg = <0x0007a000 0x200>; 78 reg = <0x0007a000 0x200>;
78 #phy-cells = <0>; 79 #phy-cells = <0>;
79 clocks = <&rpmcc RPM_SMD_LN_BB_CLK>, 80 clocks = <&rpmcc RPM_SMD_LN_BB_CLK>,
80 <&gcc GCC_USB_HS_PHY_CFG_AHB_ 81 <&gcc GCC_USB_HS_PHY_CFG_AHB_CLK>,
81 <&gcc GCC_USB2A_PHY_SLEEP_CLK 82 <&gcc GCC_USB2A_PHY_SLEEP_CLK>;
82 clock-names = "ref", "ahb", "sleep"; 83 clock-names = "ref", "ahb", "sleep";
83 resets = <&gcc GCC_USB_HS_PHY_CFG_AHB_ 84 resets = <&gcc GCC_USB_HS_PHY_CFG_AHB_BCR>,
84 <&gcc GCC_USB2A_PHY_BCR>; 85 <&gcc GCC_USB2A_PHY_BCR>;
85 reset-names = "phy", "por"; 86 reset-names = "phy", "por";
86 vdd-supply = <&vreg_l4_1p2>; 87 vdd-supply = <&vreg_l4_1p2>;
87 vdda1p8-supply = <&vreg_l5_1p8>; 88 vdda1p8-supply = <&vreg_l5_1p8>;
88 vdda3p3-supply = <&vreg_l12_3p3>; 89 vdda3p3-supply = <&vreg_l12_3p3>;
89 }; 90 };
90 ... 91 ...
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