1 # SPDX-License-Identifier: GPL-2.0 1 # SPDX-License-Identifier: GPL-2.0
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/phy/rockchi 4 $id: http://devicetree.org/schemas/phy/rockchip,inno-usb2phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: Rockchip USB2.0 phy with inno IP block 7 title: Rockchip USB2.0 phy with inno IP block
8 8
9 maintainers: 9 maintainers:
10 - Heiko Stuebner <heiko@sntech.de> 10 - Heiko Stuebner <heiko@sntech.de>
11 11
12 properties: 12 properties:
13 compatible: 13 compatible:
14 enum: 14 enum:
15 - rockchip,px30-usb2phy 15 - rockchip,px30-usb2phy
16 - rockchip,rk3128-usb2phy 16 - rockchip,rk3128-usb2phy
17 - rockchip,rk3228-usb2phy 17 - rockchip,rk3228-usb2phy
18 - rockchip,rk3308-usb2phy 18 - rockchip,rk3308-usb2phy
19 - rockchip,rk3328-usb2phy 19 - rockchip,rk3328-usb2phy
20 - rockchip,rk3366-usb2phy 20 - rockchip,rk3366-usb2phy
21 - rockchip,rk3399-usb2phy 21 - rockchip,rk3399-usb2phy
22 - rockchip,rk3568-usb2phy 22 - rockchip,rk3568-usb2phy
23 - rockchip,rk3588-usb2phy <<
24 - rockchip,rv1108-usb2phy 23 - rockchip,rv1108-usb2phy
25 24
26 reg: 25 reg:
27 maxItems: 1 26 maxItems: 1
28 27
29 clock-output-names: 28 clock-output-names:
30 description: 29 description:
31 The usb 480m output clock name. 30 The usb 480m output clock name.
32 31
33 "#clock-cells": 32 "#clock-cells":
34 const: 0 33 const: 0
35 34
36 clocks: 35 clocks:
37 maxItems: 1 36 maxItems: 1
38 37
39 clock-names: 38 clock-names:
40 const: phyclk 39 const: phyclk
41 40
42 assigned-clocks: 41 assigned-clocks:
43 description: 42 description:
44 Phandle of the usb 480m clock. 43 Phandle of the usb 480m clock.
45 44
46 assigned-clock-parents: 45 assigned-clock-parents:
47 description: 46 description:
48 Parent of the usb 480m clock. 47 Parent of the usb 480m clock.
49 Select between usb-phy output 480m and x 48 Select between usb-phy output 480m and xin24m.
50 Refer to clk/clock-bindings.txt for gene 49 Refer to clk/clock-bindings.txt for generic clock consumer properties.
51 50
52 extcon: 51 extcon:
53 description: 52 description:
54 Phandle to the extcon device providing t 53 Phandle to the extcon device providing the cable state for the otg phy.
55 54
56 interrupts: 55 interrupts:
57 description: Muxed interrupt for both port 56 description: Muxed interrupt for both ports
58 maxItems: 1 57 maxItems: 1
59 58
60 resets: <<
61 maxItems: 2 <<
62 <<
63 reset-names: <<
64 items: <<
65 - const: phy <<
66 - const: apb <<
67 <<
68 rockchip,usbgrf: 59 rockchip,usbgrf:
69 $ref: /schemas/types.yaml#/definitions/pha 60 $ref: /schemas/types.yaml#/definitions/phandle
70 description: 61 description:
71 Phandle to the syscon managing the 'usb 62 Phandle to the syscon managing the 'usb general register files'.
72 When set the driver will request its pha 63 When set the driver will request its phandle as one companion-grf
73 for some special SoCs (e.g rv1108). 64 for some special SoCs (e.g rv1108).
74 65
75 host-port: 66 host-port:
76 type: object 67 type: object
77 additionalProperties: false 68 additionalProperties: false
78 69
79 properties: 70 properties:
80 "#phy-cells": 71 "#phy-cells":
81 const: 0 72 const: 0
82 73
83 interrupts: 74 interrupts:
84 description: host linestate interrupt 75 description: host linestate interrupt
85 maxItems: 1 76 maxItems: 1
86 77
87 interrupt-names: 78 interrupt-names:
88 const: linestate 79 const: linestate
89 80
90 phy-supply: 81 phy-supply:
91 description: 82 description:
92 Phandle to a regulator that provides 83 Phandle to a regulator that provides power to VBUS.
93 See ./phy-bindings.txt for details. 84 See ./phy-bindings.txt for details.
94 85
95 required: 86 required:
96 - "#phy-cells" 87 - "#phy-cells"
97 88
98 otg-port: 89 otg-port:
99 type: object 90 type: object
100 additionalProperties: false 91 additionalProperties: false
101 92
102 properties: 93 properties:
103 "#phy-cells": 94 "#phy-cells":
104 const: 0 95 const: 0
105 96
106 interrupts: 97 interrupts:
107 minItems: 1 98 minItems: 1
108 maxItems: 3 99 maxItems: 3
109 100
110 interrupt-names: 101 interrupt-names:
111 oneOf: 102 oneOf:
112 - const: linestate 103 - const: linestate
113 - const: otg-mux 104 - const: otg-mux
114 - items: 105 - items:
115 - const: otg-bvalid 106 - const: otg-bvalid
116 - const: otg-id 107 - const: otg-id
117 - const: linestate 108 - const: linestate
118 109
119 phy-supply: 110 phy-supply:
120 description: 111 description:
121 Phandle to a regulator that provides 112 Phandle to a regulator that provides power to VBUS.
122 See ./phy-bindings.txt for details. 113 See ./phy-bindings.txt for details.
123 114
124 required: 115 required:
125 - "#phy-cells" 116 - "#phy-cells"
126 117
127 required: 118 required:
128 - compatible 119 - compatible
129 - reg 120 - reg
130 - clock-output-names 121 - clock-output-names
131 - "#clock-cells" 122 - "#clock-cells"
132 !! 123 - host-port
133 anyOf: !! 124 - otg-port
134 - required: <<
135 - otg-port <<
136 - required: <<
137 - host-port <<
138 125
139 allOf: 126 allOf:
140 - if: 127 - if:
141 properties: 128 properties:
142 compatible: 129 compatible:
143 contains: 130 contains:
144 enum: !! 131 const: rockchip,rk3568-usb2phy
145 - rockchip,rk3568-usb2phy <<
146 - rockchip,rk3588-usb2phy <<
147 132
148 then: 133 then:
149 properties: 134 properties:
150 host-port: 135 host-port:
151 properties: 136 properties:
152 interrupts: false 137 interrupts: false
153 138
154 otg-port: 139 otg-port:
155 properties: 140 properties:
156 interrupts: false 141 interrupts: false
157 142
158 required: 143 required:
159 - interrupts 144 - interrupts
160 145
161 else: 146 else:
162 properties: 147 properties:
163 interrupts: false 148 interrupts: false
164 149
165 host-port: 150 host-port:
166 required: 151 required:
167 - interrupts 152 - interrupts
168 - interrupt-names 153 - interrupt-names
169 154
170 otg-port: 155 otg-port:
171 required: 156 required:
172 - interrupts 157 - interrupts
173 - interrupt-names 158 - interrupt-names
174 159
175 additionalProperties: false 160 additionalProperties: false
176 161
177 examples: 162 examples:
178 - | 163 - |
179 #include <dt-bindings/clock/rk3399-cru.h> 164 #include <dt-bindings/clock/rk3399-cru.h>
180 #include <dt-bindings/interrupt-controller 165 #include <dt-bindings/interrupt-controller/arm-gic.h>
181 #include <dt-bindings/interrupt-controller 166 #include <dt-bindings/interrupt-controller/irq.h>
182 u2phy0: usb2phy@e450 { 167 u2phy0: usb2phy@e450 {
183 compatible = "rockchip,rk3399-usb2phy"; 168 compatible = "rockchip,rk3399-usb2phy";
184 reg = <0xe450 0x10>; 169 reg = <0xe450 0x10>;
185 clocks = <&cru SCLK_USB2PHY0_REF>; 170 clocks = <&cru SCLK_USB2PHY0_REF>;
186 clock-names = "phyclk"; 171 clock-names = "phyclk";
187 clock-output-names = "clk_usbphy0_480m"; 172 clock-output-names = "clk_usbphy0_480m";
188 #clock-cells = <0>; 173 #clock-cells = <0>;
189 174
190 u2phy0_host: host-port { 175 u2phy0_host: host-port {
191 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVE 176 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH 0>;
192 interrupt-names = "linestate"; 177 interrupt-names = "linestate";
193 #phy-cells = <0>; 178 #phy-cells = <0>;
194 }; 179 };
195 180
196 u2phy0_otg: otg-port { 181 u2phy0_otg: otg-port {
197 interrupts = <GIC_SPI 103 IRQ_TYPE_LEV 182 interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH 0>,
198 <GIC_SPI 104 IRQ_TYPE_LEV 183 <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH 0>,
199 <GIC_SPI 106 IRQ_TYPE_LEV 184 <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH 0>;
200 interrupt-names = "otg-bvalid", "otg-i 185 interrupt-names = "otg-bvalid", "otg-id", "linestate";
201 #phy-cells = <0>; 186 #phy-cells = <0>;
202 }; 187 };
203 }; 188 };
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