1 Rockchip PCIE PHY 1 Rockchip PCIE PHY
2 ----------------------- 2 -----------------------
3 3
4 Required properties: 4 Required properties:
5 - compatible: rockchip,rk3399-pcie-phy 5 - compatible: rockchip,rk3399-pcie-phy
6 - clocks: Must contain an entry in clock-name 6 - clocks: Must contain an entry in clock-names.
7 See ../clocks/clock-bindings.txt for d 7 See ../clocks/clock-bindings.txt for details.
8 - clock-names: Must be "refclk" 8 - clock-names: Must be "refclk"
9 - resets: Must contain an entry in reset-name 9 - resets: Must contain an entry in reset-names.
10 See ../reset/reset.txt for details. 10 See ../reset/reset.txt for details.
11 - reset-names: Must be "phy" 11 - reset-names: Must be "phy"
12 12
13 Required properties for legacy PHY mode (depre 13 Required properties for legacy PHY mode (deprecated):
14 - #phy-cells: must be 0 14 - #phy-cells: must be 0
15 15
16 Required properties for per-lane PHY mode (pre 16 Required properties for per-lane PHY mode (preferred):
17 - #phy-cells: must be 1 17 - #phy-cells: must be 1
18 18
19 Example: 19 Example:
20 20
21 grf: syscon@ff770000 { 21 grf: syscon@ff770000 {
22 compatible = "rockchip,rk3399-grf", "s 22 compatible = "rockchip,rk3399-grf", "syscon", "simple-mfd";
23 #address-cells = <1>; 23 #address-cells = <1>;
24 #size-cells = <1>; 24 #size-cells = <1>;
25 25
26 ... 26 ...
27 27
28 pcie_phy: pcie-phy { 28 pcie_phy: pcie-phy {
29 compatible = "rockchip,rk3399- 29 compatible = "rockchip,rk3399-pcie-phy";
30 #phy-cells = <0>; 30 #phy-cells = <0>;
31 clocks = <&cru SCLK_PCIEPHY_RE 31 clocks = <&cru SCLK_PCIEPHY_REF>;
32 clock-names = "refclk"; 32 clock-names = "refclk";
33 resets = <&cru SRST_PCIEPHY>; 33 resets = <&cru SRST_PCIEPHY>;
34 reset-names = "phy"; 34 reset-names = "phy";
35 }; 35 };
36 }; 36 };
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