1 # SPDX-License-Identifier: GPL-2.0-only OR BSD 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/phy/samsung 4 $id: http://devicetree.org/schemas/phy/samsung,usb3-drd-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: Samsung Exynos SoC USB 3.0 DRD PHY USB 7 title: Samsung Exynos SoC USB 3.0 DRD PHY USB 2.0 PHY
8 8
9 maintainers: 9 maintainers:
10 - Krzysztof Kozlowski <krzk@kernel.org> 10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Marek Szyprowski <m.szyprowski@samsung.com> 11 - Marek Szyprowski <m.szyprowski@samsung.com>
12 - Sylwester Nawrocki <s.nawrocki@samsung.com> 12 - Sylwester Nawrocki <s.nawrocki@samsung.com>
13 13
14 description: | 14 description: |
15 For samsung,exynos5250-usbdrd-phy and samsun 15 For samsung,exynos5250-usbdrd-phy and samsung,exynos5420-usbdrd-phy
16 compatible PHYs, the second cell in the PHY 16 compatible PHYs, the second cell in the PHY specifier identifies the
17 PHY id, which is interpreted as follows:: 17 PHY id, which is interpreted as follows::
18 0 - UTMI+ type phy, 18 0 - UTMI+ type phy,
19 1 - PIPE3 type phy. 19 1 - PIPE3 type phy.
20 20
21 For SoCs like Exynos5420 having multiple USB 21 For SoCs like Exynos5420 having multiple USB 3.0 DRD PHY controllers,
22 'usbdrd_phy' nodes should have numbered alia 22 'usbdrd_phy' nodes should have numbered alias in the aliases node, in the
23 form of usbdrdphyN, N = 0, 1... (depending o 23 form of usbdrdphyN, N = 0, 1... (depending on number of controllers).
24 24
25 properties: 25 properties:
26 compatible: 26 compatible:
27 enum: 27 enum:
28 - google,gs101-usb31drd-phy <<
29 - samsung,exynos5250-usbdrd-phy 28 - samsung,exynos5250-usbdrd-phy
30 - samsung,exynos5420-usbdrd-phy 29 - samsung,exynos5420-usbdrd-phy
31 - samsung,exynos5433-usbdrd-phy 30 - samsung,exynos5433-usbdrd-phy
32 - samsung,exynos7-usbdrd-phy 31 - samsung,exynos7-usbdrd-phy
33 - samsung,exynos850-usbdrd-phy <<
34 32
35 clocks: 33 clocks:
36 minItems: 2 34 minItems: 2
37 maxItems: 5 35 maxItems: 5
38 36
39 clock-names: 37 clock-names:
40 minItems: 2 38 minItems: 2
41 maxItems: 5 39 maxItems: 5
42 description: | 40 description: |
43 At least two clocks:: 41 At least two clocks::
44 - Main PHY clock (same as USB DRD cont 42 - Main PHY clock (same as USB DRD controller i.e. DWC3 IP clock), used
45 for register access. 43 for register access.
46 - PHY reference clock (usually crystal 44 - PHY reference clock (usually crystal clock), used for PHY operations,
47 associated by phy name. It is used t 45 associated by phy name. It is used to determine bit values for clock
48 settings register. For Exynos5420 t 46 settings register. For Exynos5420 this is given as 'sclk_usbphy30'
49 in the CMU. 47 in the CMU.
50 48
51 "#phy-cells": 49 "#phy-cells":
52 const: 1 50 const: 1
53 51
54 port: 52 port:
55 $ref: /schemas/graph.yaml#/properties/port 53 $ref: /schemas/graph.yaml#/properties/port
56 description: 54 description:
57 Any connector to the data bus of this co 55 Any connector to the data bus of this controller should be modelled using
58 the OF graph bindings specified. 56 the OF graph bindings specified.
59 57
60 reg: 58 reg:
61 minItems: 1 !! 59 maxItems: 1
62 maxItems: 3 <<
63 <<
64 reg-names: <<
65 minItems: 1 <<
66 items: <<
67 - const: phy <<
68 - const: pcs <<
69 - const: pma <<
70 60
71 samsung,pmu-syscon: 61 samsung,pmu-syscon:
72 $ref: /schemas/types.yaml#/definitions/pha 62 $ref: /schemas/types.yaml#/definitions/phandle
73 description: 63 description:
74 Phandle to PMU system controller interfa 64 Phandle to PMU system controller interface.
75 65
76 vbus-supply: 66 vbus-supply:
77 description: 67 description:
78 VBUS power source. 68 VBUS power source.
79 69
80 vbus-boost-supply: 70 vbus-boost-supply:
81 description: 71 description:
82 VBUS Boost 5V power source. 72 VBUS Boost 5V power source.
83 73
84 pll-supply: <<
85 description: Power supply for the USB PLL. <<
86 dvdd-usb20-supply: <<
87 description: DVDD power supply for the USB <<
88 vddh-usb20-supply: <<
89 description: VDDh power supply for the USB <<
90 vdd33-usb20-supply: <<
91 description: 3.3V power supply for the USB <<
92 vdda-usbdp-supply: <<
93 description: VDDa power supply for the USB <<
94 vddh-usbdp-supply: <<
95 description: VDDh power supply for the USB <<
96 <<
97 required: 74 required:
98 - compatible 75 - compatible
99 - clocks 76 - clocks
100 - clock-names 77 - clock-names
101 - "#phy-cells" 78 - "#phy-cells"
102 - reg 79 - reg
103 - samsung,pmu-syscon 80 - samsung,pmu-syscon
104 81
105 allOf: 82 allOf:
106 - if: 83 - if:
107 properties: 84 properties:
108 compatible: 85 compatible:
109 contains: 86 contains:
110 const: google,gs101-usb31drd-phy <<
111 then: <<
112 properties: <<
113 clocks: <<
114 items: <<
115 - description: Gate of main PHY cl <<
116 - description: Gate of PHY referen <<
117 - description: Gate of control int <<
118 - description: Gate of control int <<
119 - description: Gate of SCL APB clo <<
120 clock-names: <<
121 items: <<
122 - const: phy <<
123 - const: ref <<
124 - const: ctrl_aclk <<
125 - const: ctrl_pclk <<
126 - const: scl_pclk <<
127 reg: <<
128 minItems: 3 <<
129 reg-names: <<
130 minItems: 3 <<
131 required: <<
132 - reg-names <<
133 - pll-supply <<
134 - dvdd-usb20-supply <<
135 - vddh-usb20-supply <<
136 - vdd33-usb20-supply <<
137 - vdda-usbdp-supply <<
138 - vddh-usbdp-supply <<
139 <<
140 - if: <<
141 properties: <<
142 compatible: <<
143 contains: <<
144 enum: 87 enum:
145 - samsung,exynos5433-usbdrd-phy 88 - samsung,exynos5433-usbdrd-phy
146 - samsung,exynos7-usbdrd-phy 89 - samsung,exynos7-usbdrd-phy
147 then: 90 then:
148 properties: 91 properties:
149 clocks: 92 clocks:
150 minItems: 5 93 minItems: 5
151 maxItems: 5 94 maxItems: 5
152 clock-names: 95 clock-names:
153 items: 96 items:
154 - const: phy 97 - const: phy
155 - const: ref 98 - const: ref
156 - const: phy_utmi 99 - const: phy_utmi
157 - const: phy_pipe 100 - const: phy_pipe
158 - const: itp 101 - const: itp
159 reg: !! 102 else:
160 maxItems: 1 <<
161 reg-names: <<
162 maxItems: 1 <<
163 <<
164 - if: <<
165 properties: <<
166 compatible: <<
167 contains: <<
168 enum: <<
169 - samsung,exynos5250-usbdrd-phy <<
170 - samsung,exynos5420-usbdrd-phy <<
171 - samsung,exynos850-usbdrd-phy <<
172 then: <<
173 properties: 103 properties:
174 clocks: 104 clocks:
175 minItems: 2 105 minItems: 2
176 maxItems: 2 106 maxItems: 2
177 clock-names: 107 clock-names:
178 items: 108 items:
179 - const: phy 109 - const: phy
180 - const: ref 110 - const: ref
181 reg: <<
182 maxItems: 1 <<
183 reg-names: <<
184 maxItems: 1 <<
185 111
186 additionalProperties: false 112 additionalProperties: false
187 113
188 examples: 114 examples:
189 - | 115 - |
190 #include <dt-bindings/clock/exynos5420.h> 116 #include <dt-bindings/clock/exynos5420.h>
191 117
192 phy@12100000 { 118 phy@12100000 {
193 compatible = "samsung,exynos5420-usbdr 119 compatible = "samsung,exynos5420-usbdrd-phy";
194 reg = <0x12100000 0x100>; 120 reg = <0x12100000 0x100>;
195 #phy-cells = <1>; 121 #phy-cells = <1>;
196 clocks = <&clock CLK_USBD300>, <&clock 122 clocks = <&clock CLK_USBD300>, <&clock CLK_SCLK_USBPHY300>;
197 clock-names = "phy", "ref"; 123 clock-names = "phy", "ref";
198 samsung,pmu-syscon = <&pmu_system_cont 124 samsung,pmu-syscon = <&pmu_system_controller>;
199 vbus-supply = <&usb300_vbus_reg>; 125 vbus-supply = <&usb300_vbus_reg>;
200 }; 126 };
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