1 Abilis Systems TB10x pin controller 1 Abilis Systems TB10x pin controller
2 =================================== 2 ===================================
3 3
4 Required properties 4 Required properties
5 ------------------- 5 -------------------
6 6
7 - compatible: should be "abilis,tb10x-iomux"; 7 - compatible: should be "abilis,tb10x-iomux";
8 - reg: should contain the physical address and 8 - reg: should contain the physical address and size of the pin controller's
9 register range. 9 register range.
10 10
11 11
12 Function definitions 12 Function definitions
13 -------------------- 13 --------------------
14 14
15 Functions are defined (and referenced) by sub- 15 Functions are defined (and referenced) by sub-nodes of the pin controller.
16 Every sub-node defines exactly one function (i 16 Every sub-node defines exactly one function (implying a set of pins).
17 Every function is associated to one named pin 17 Every function is associated to one named pin group inside the pin controller
18 driver and these names are used to associate p 18 driver and these names are used to associate pin group predefinitions to pin
19 controller sub-nodes. 19 controller sub-nodes.
20 20
21 Required function definition subnode propertie 21 Required function definition subnode properties:
22 - abilis,function: should be set to the name 22 - abilis,function: should be set to the name of the function's pin group.
23 23
24 The following pin groups are available: 24 The following pin groups are available:
25 - GPIO ports: gpioa, gpiob, gpioc, gpiod, gp 25 - GPIO ports: gpioa, gpiob, gpioc, gpiod, gpioe, gpiof, gpiog,
26 gpioh, gpioi, gpioj, gpiok, gp 26 gpioh, gpioi, gpioj, gpiok, gpiol, gpiom, gpion
27 - Serial TS input ports: mis0, mis1, mis2, m 27 - Serial TS input ports: mis0, mis1, mis2, mis3, mis4, mis5, mis6, mis7
28 - Parallel TS input ports: mip1, mip3, mip5, 28 - Parallel TS input ports: mip1, mip3, mip5, mip7
29 - Serial TS output ports: mos0, mos1, mos2, 29 - Serial TS output ports: mos0, mos1, mos2, mos3
30 - Parallel TS output port: mop 30 - Parallel TS output port: mop
31 - CI+ port: ciplus 31 - CI+ port: ciplus
32 - CableCard (Mcard) port: mcard 32 - CableCard (Mcard) port: mcard
33 - Smart card ports: stc0, stc1 33 - Smart card ports: stc0, stc1
34 - UART ports: uart0, uart1 34 - UART ports: uart0, uart1
35 - SPI ports: spi1, spi3 35 - SPI ports: spi1, spi3
36 - JTAG: jtag 36 - JTAG: jtag
37 37
38 All other ports of the chip are not multiplexe 38 All other ports of the chip are not multiplexed and thus not managed by this
39 driver. 39 driver.
40 40
41 41
42 GPIO ranges definition 42 GPIO ranges definition
43 ---------------------- 43 ----------------------
44 44
45 The named pin groups of GPIO ports can be used 45 The named pin groups of GPIO ports can be used to define GPIO ranges as
46 explained in Documentation/devicetree/bindings 46 explained in Documentation/devicetree/bindings/gpio/gpio.txt.
47 47
48 48
49 Example 49 Example
50 ------- 50 -------
51 51
52 iomux: iomux@ff10601c { !! 52 iomux: iomux@FF10601c {
53 compatible = "abilis,tb10x-iomux"; 53 compatible = "abilis,tb10x-iomux";
54 reg = <0xFF10601c 0x4>; 54 reg = <0xFF10601c 0x4>;
55 pctl_gpio_a: pctl-gpio-a { 55 pctl_gpio_a: pctl-gpio-a {
56 abilis,function = "gpioa"; 56 abilis,function = "gpioa";
57 }; 57 };
58 pctl_uart0: pctl-uart0 { 58 pctl_uart0: pctl-uart0 {
59 abilis,function = "uart0"; 59 abilis,function = "uart0";
60 }; 60 };
61 }; 61 };
62 uart@ff100000 { !! 62 uart@FF100000 {
63 compatible = "snps,dw-apb-uart"; 63 compatible = "snps,dw-apb-uart";
64 reg = <0xFF100000 0x100>; 64 reg = <0xFF100000 0x100>;
65 clock-frequency = <166666666>; 65 clock-frequency = <166666666>;
66 interrupts = <25 1>; 66 interrupts = <25 1>;
67 reg-shift = <2>; 67 reg-shift = <2>;
68 reg-io-width = <4>; 68 reg-io-width = <4>;
69 pinctrl-names = "default"; 69 pinctrl-names = "default";
70 pinctrl-0 = <&pctl_uart0>; 70 pinctrl-0 = <&pctl_uart0>;
71 }; 71 };
72 gpioa: gpio@ff140000 { !! 72 gpioa: gpio@FF140000 {
73 compatible = "abilis,tb10x-gpio"; 73 compatible = "abilis,tb10x-gpio";
74 reg = <0xFF140000 0x1000>; 74 reg = <0xFF140000 0x1000>;
75 gpio-controller; 75 gpio-controller;
76 #gpio-cells = <2>; 76 #gpio-cells = <2>;
77 ngpio = <3>; 77 ngpio = <3>;
78 gpio-ranges = <&iomux 0 0>; 78 gpio-ranges = <&iomux 0 0>;
79 gpio-ranges-group-names = "gpioa"; 79 gpio-ranges-group-names = "gpioa";
80 }; 80 };
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