1 # SPDX-License-Identifier: (GPL-2.0-only OR BS 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 %YAML 1.2 2 %YAML 1.2 3 --- 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/aml 4 $id: http://devicetree.org/schemas/pinctrl/amlogic,meson-pinctrl-g12a-aobus.yaml# 5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 6 6 7 title: Amlogic Meson G12 AOBUS pinmux controll 7 title: Amlogic Meson G12 AOBUS pinmux controller 8 8 9 maintainers: 9 maintainers: 10 - Neil Armstrong <neil.armstrong@linaro.org> 10 - Neil Armstrong <neil.armstrong@linaro.org> 11 11 12 allOf: 12 allOf: 13 - $ref: amlogic,meson-pinctrl-common.yaml# 13 - $ref: amlogic,meson-pinctrl-common.yaml# 14 14 15 properties: 15 properties: 16 compatible: 16 compatible: 17 enum: 17 enum: 18 - amlogic,meson-g12a-aobus-pinctrl 18 - amlogic,meson-g12a-aobus-pinctrl 19 19 20 required: 20 required: 21 - compatible 21 - compatible 22 22 23 patternProperties: 23 patternProperties: 24 "^bank@[0-9a-f]+$": 24 "^bank@[0-9a-f]+$": 25 $ref: amlogic,meson-pinctrl-common.yaml#/$ 25 $ref: amlogic,meson-pinctrl-common.yaml#/$defs/meson-gpio 26 26 27 unevaluatedProperties: false 27 unevaluatedProperties: false 28 28 29 properties: 29 properties: 30 reg: 30 reg: 31 maxItems: 3 31 maxItems: 3 32 32 33 reg-names: 33 reg-names: 34 items: 34 items: 35 - const: mux 35 - const: mux 36 - const: ds 36 - const: ds 37 - const: gpio 37 - const: gpio 38 38 39 gpio-line-names: 39 gpio-line-names: 40 maxItems: 15 40 maxItems: 15 41 41 42 unevaluatedProperties: 42 unevaluatedProperties: 43 type: object 43 type: object 44 $ref: amlogic,meson-pinctrl-common.yaml#/$de 44 $ref: amlogic,meson-pinctrl-common.yaml#/$defs/meson-pins 45 45 46 examples: 46 examples: 47 - | 47 - | 48 ao_pinctrl: pinctrl { 48 ao_pinctrl: pinctrl { 49 compatible = "amlogic,meson-g12a-aobus-p 49 compatible = "amlogic,meson-g12a-aobus-pinctrl"; 50 #address-cells = <1>; 50 #address-cells = <1>; 51 #size-cells = <1>; 51 #size-cells = <1>; 52 ranges; 52 ranges; 53 53 54 bank@14 { 54 bank@14 { 55 reg = <0x14 0x8>, 55 reg = <0x14 0x8>, 56 <0x1c 0x8>, 56 <0x1c 0x8>, 57 <0x24 0x14>; 57 <0x24 0x14>; 58 reg-names = "mux", "ds", "gpio"; 58 reg-names = "mux", "ds", "gpio"; 59 gpio-controller; 59 gpio-controller; 60 #gpio-cells = <2>; 60 #gpio-cells = <2>; 61 gpio-ranges = <&ao_pinctrl 0 0 15>; 61 gpio-ranges = <&ao_pinctrl 0 0 15>; 62 }; 62 }; 63 63 64 cec_ao_a_h_pins: cec_ao_a_h { 64 cec_ao_a_h_pins: cec_ao_a_h { 65 mux { 65 mux { 66 groups = "cec_ao_a_h"; 66 groups = "cec_ao_a_h"; 67 function = "cec_ao_a_h"; 67 function = "cec_ao_a_h"; 68 bias-disable; 68 bias-disable; 69 }; 69 }; 70 }; 70 }; 71 }; 71 };
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