1 # SPDX-License-Identifier: GPL-2.0-only OR BSD 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/pinctrl/nuv 4 $id: http://devicetree.org/schemas/pinctrl/nuvoton,npcm845-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: Nuvoton NPCM845 Pin Controller and GPIO 7 title: Nuvoton NPCM845 Pin Controller and GPIO
8 8
9 maintainers: 9 maintainers:
10 - Tomer Maimon <tmaimon77@gmail.com> 10 - Tomer Maimon <tmaimon77@gmail.com>
11 11
12 description: 12 description:
13 The Nuvoton BMC NPCM8XX Pin Controller multi 13 The Nuvoton BMC NPCM8XX Pin Controller multi-function routed through
14 the multiplexing block, Each pin supports GP 14 the multiplexing block, Each pin supports GPIO functionality (GPIOx)
15 and multiple functions that directly connect 15 and multiple functions that directly connect the pin to different
16 hardware blocks. 16 hardware blocks.
17 17
18 properties: 18 properties:
19 compatible: 19 compatible:
20 const: nuvoton,npcm845-pinctrl 20 const: nuvoton,npcm845-pinctrl
21 21
22 ranges: 22 ranges:
23 maxItems: 1 23 maxItems: 1
24 24
25 '#address-cells': 25 '#address-cells':
26 const: 1 26 const: 1
27 27
28 '#size-cells': 28 '#size-cells':
29 const: 1 29 const: 1
30 30
31 nuvoton,sysgcr: 31 nuvoton,sysgcr:
32 $ref: /schemas/types.yaml#/definitions/pha 32 $ref: /schemas/types.yaml#/definitions/phandle
33 description: a phandle to access GCR regis 33 description: a phandle to access GCR registers.
34 34
35 patternProperties: 35 patternProperties:
36 '^gpio@': 36 '^gpio@':
37 type: object 37 type: object
38 additionalProperties: false 38 additionalProperties: false
39 39
40 description: 40 description:
41 Eight GPIO banks that each contain 32 GP 41 Eight GPIO banks that each contain 32 GPIOs.
42 42
43 properties: 43 properties:
44 gpio-controller: true 44 gpio-controller: true
45 45
46 '#gpio-cells': 46 '#gpio-cells':
47 const: 2 47 const: 2
48 48
49 reg: 49 reg:
50 maxItems: 1 50 maxItems: 1
51 51
52 interrupts: 52 interrupts:
53 maxItems: 1 53 maxItems: 1
54 54
55 gpio-ranges: 55 gpio-ranges:
56 maxItems: 1 56 maxItems: 1
57 57
58 required: 58 required:
59 - gpio-controller 59 - gpio-controller
60 - '#gpio-cells' 60 - '#gpio-cells'
61 - reg 61 - reg
62 - interrupts 62 - interrupts
63 - gpio-ranges 63 - gpio-ranges
64 64
65 '-mux$': 65 '-mux$':
66 $ref: pinmux-node.yaml# 66 $ref: pinmux-node.yaml#
67 67
68 properties: 68 properties:
69 groups: 69 groups:
70 description: 70 description:
71 One or more groups of pins to mux to 71 One or more groups of pins to mux to a certain function
72 items: 72 items:
73 enum: [ iox1, iox2, smb1d, smb2d, lk 73 enum: [ iox1, iox2, smb1d, smb2d, lkgpo1, lkgpo2, ioxh, gspi,
74 smb5b, smb5c, lkgpo0, pspi, !! 74 smb5b, smb5c, lkgpo0, pspi, jm1, jm2, smb4den, smb4b,
75 smb16, smb17, smb18, smb19, !! 75 smb4c, smb15, smb16, smb17, smb18, smb19, smb20, smb21,
76 smb23b, smb4d, smb14, smb5, !! 76 smb22, smb23, smb23b, smb4d, smb14, smb5, smb4, smb3,
77 spi0cs3, spi1cs0, spi1cs1, s !! 77 spi0cs1, spi0cs2, spi0cs3, spi1cs0, spi1cs1, spi1cs2,
78 smb3b, bmcuart0a, uart1, jta !! 78 spi1cs3, spi1cs23, smb3c, smb3b, bmcuart0a, uart1, jtag2,
79 bmcuart0b, r1err, r1md, r1oe !! 79 bmcuart1, uart2, sg1mdio, bmcuart0b, r1err, r1md, r1oen,
80 fanin0, fanin1, fanin2, fani !! 80 r2oen, rmii3, r3oen, smb3d, fanin0, fanin1, fanin2, fanin3,
81 fanin7, fanin8, fanin9, fani !! 81 fanin4, fanin5, fanin6, fanin7, fanin8, fanin9, fanin10,
82 fanin14, fanin15, pwm0, pwm1 !! 82 fanin11, fanin12, fanin13, fanin14, fanin15, pwm0, pwm1, pwm2,
83 r3rxer, ga20kbc, smb5d, lpc, !! 83 pwm3, r2, r2err, r2md, r3rxer, ga20kbc, smb5d, lpc, espi, rg2,
84 i3c2, i3c3, i3c4, i3c5, smb0 !! 84 ddr, i3c0, i3c1, i3c2, i3c3, i3c4, i3c5, smb0, smb1, smb2,
85 smb1b, smb8, smb9, smb10, sm !! 85 smb2c, smb2b, smb1c, smb1b, smb8, smb9, smb10, smb11, sd1,
86 pwm6, pwm7, pwm8, pwm9, pwm1 !! 86 sd1pwr, pwm4, pwm5, pwm6, pwm7, pwm8, pwm9, pwm10, pwm11,
87 mmcrst, clkout, serirq, scip !! 87 mmc8, mmc, mmcwp, mmccd, mmcrst, clkout, serirq, lpcclk,
88 smb6d, smb7, smb7b, smb7c, s !! 88 scipme, smi, smb6, smb6b, smb6c, smb6d, smb7, smb7b, smb7c,
89 spi3cs1, spi3quad, spi3cs2, !! 89 smb7d, spi1, faninx, r1, spi3, spi3cs1, spi3quad, spi3cs2,
90 smb0den, smb0d, ddc, rg2mdio !! 90 spi3cs3, nprd_smi, smb0b, smb0c, smb0den, smb0d, ddc, rg2mdio,
91 spix, spixcs1, clkreq, hgpio !! 91 wdog1, wdog2, smb12, smb13, spix, spixcs1, clkreq, hgpio0,
92 hgpio5, hgpio6, hgpio7, bu4, !! 92 hgpio1, hgpio2, hgpio3, hgpio4, hgpio5, hgpio6, hgpio7, bu4,
>> 93 bu4b, bu5, bu5b, bu6, gpo187 ]
93 94
94 function: 95 function:
95 description: 96 description:
96 The function that a group of pins is 97 The function that a group of pins is muxed to
97 enum: [ iox1, iox2, smb1d, smb2d, lkgp !! 98 enum: [ iox1, iox2, smb1d, smb2d, lkgpo1, lkgpo2, ioxh, gspi,
98 smb5c, lkgpo0, pspi, jm1, jm2, !! 99 smb5b, smb5c, lkgpo0, pspi, jm1, jm2, smb4den, smb4b,
99 smb17, smb18, smb19, smb20, sm !! 100 smb4c, smb15, smb16, smb17, smb18, smb19, smb20, smb21,
100 smb14, smb5, smb4, smb3, spi0c !! 101 smb22, smb23, smb23b, smb4d, smb14, smb5, smb4, smb3,
101 spi1cs1, spi1cs2, spi1cs3, spi !! 102 spi0cs1, spi0cs2, spi0cs3, spi1cs0, spi1cs1, spi1cs2,
102 uart1, jtag2, bmcuart1, uart2, !! 103 spi1cs3, spi1cs23, smb3c, smb3b, bmcuart0a, uart1, jtag2,
103 r1oen, r2oen, rmii3, r3oen, sm !! 104 bmcuart1, uart2, sg1mdio, bmcuart0b, r1err, r1md, r1oen,
104 fanin3, fanin4, fanin5, fanin6 !! 105 r2oen, rmii3, r3oen, smb3d, fanin0, fanin1, fanin2, fanin3,
>> 106 fanin4, fanin5, fanin6, fanin7, fanin8, fanin9, fanin10,
105 fanin11, fanin12, fanin13, fan 107 fanin11, fanin12, fanin13, fanin14, fanin15, pwm0, pwm1, pwm2,
106 pwm3, r2, r2err, r2md, r3rxer, 108 pwm3, r2, r2err, r2md, r3rxer, ga20kbc, smb5d, lpc, espi, rg2,
107 ddr, i3c0, i3c1, i3c2, i3c3, i 109 ddr, i3c0, i3c1, i3c2, i3c3, i3c4, i3c5, smb0, smb1, smb2,
108 smb2c, smb2b, smb1c, smb1b, sm 110 smb2c, smb2b, smb1c, smb1b, smb8, smb9, smb10, smb11, sd1,
109 sd1pwr, pwm4, pwm5, pwm6, pwm7 111 sd1pwr, pwm4, pwm5, pwm6, pwm7, pwm8, pwm9, pwm10, pwm11,
110 mmc8, mmc, mmcwp, mmccd, mmcrs !! 112 mmc8, mmc, mmcwp, mmccd, mmcrst, clkout, serirq, lpcclk,
111 smb6, smb6b, smb6c, smb6d, smb !! 113 scipme, smi, smb6, smb6b, smb6c, smb6d, smb7, smb7b, smb7c,
112 faninx, r1, spi3, spi3cs1, spi !! 114 smb7d, spi1, faninx, r1, spi3, spi3cs1, spi3quad, spi3cs2,
113 smb0b, smb0c, smb0den, smb0d, !! 115 spi3cs3, nprd_smi, smb0b, smb0c, smb0den, smb0d, ddc, rg2mdio,
114 smb12, smb13, spix, spixcs1, c !! 116 wdog1, wdog2, smb12, smb13, spix, spixcs1, clkreq, hgpio0,
115 hgpio3, hgpio4, hgpio5, hgpio6 !! 117 hgpio1, hgpio2, hgpio3, hgpio4, hgpio5, hgpio6, hgpio7, bu4,
116 bu6, gpo187 ] !! 118 bu4b, bu5, bu5b, bu6, gpo187 ]
117 119
118 dependencies: 120 dependencies:
119 groups: [ function ] 121 groups: [ function ]
120 function: [ groups ] 122 function: [ groups ]
121 123
122 additionalProperties: false 124 additionalProperties: false
123 125
124 '^pin': 126 '^pin':
125 $ref: pincfg-node.yaml# 127 $ref: pincfg-node.yaml#
126 128
127 properties: 129 properties:
128 pins: 130 pins:
129 description: 131 description:
130 A list of pins to configure in certa 132 A list of pins to configure in certain ways, such as enabling
131 debouncing 133 debouncing
132 items: 134 items:
133 pattern: '^GPIO([0-9]|[0-9][0-9]|1[0 135 pattern: '^GPIO([0-9]|[0-9][0-9]|1[0-9][0-9]|2[0-4][0-9]|25[0-6])'
134 136
135 bias-disable: true 137 bias-disable: true
136 138
137 bias-pull-up: true 139 bias-pull-up: true
138 140
139 bias-pull-down: true 141 bias-pull-down: true
140 142
141 input-enable: true 143 input-enable: true
142 144
143 output-low: true 145 output-low: true
144 146
145 output-high: true 147 output-high: true
146 148
147 drive-push-pull: true 149 drive-push-pull: true
148 150
149 drive-open-drain: true 151 drive-open-drain: true
150 152
151 input-debounce: 153 input-debounce:
152 description: 154 description:
153 Debouncing periods in microseconds, 155 Debouncing periods in microseconds, one period per interrupt
154 bank found in the controller 156 bank found in the controller
155 minItems: 1 157 minItems: 1
156 maxItems: 4 158 maxItems: 4
157 159
158 slew-rate: 160 slew-rate:
159 description: | 161 description: |
160 0: Low rate 162 0: Low rate
161 1: High rate 163 1: High rate
162 enum: [0, 1] 164 enum: [0, 1]
163 165
164 drive-strength: 166 drive-strength:
165 enum: [ 0, 1, 2, 4, 8, 12 ] 167 enum: [ 0, 1, 2, 4, 8, 12 ]
166 168
167 additionalProperties: false 169 additionalProperties: false
168 170
169 allOf: 171 allOf:
170 - $ref: pinctrl.yaml# 172 - $ref: pinctrl.yaml#
171 173
172 required: 174 required:
173 - compatible 175 - compatible
174 - ranges 176 - ranges
175 - '#address-cells' 177 - '#address-cells'
176 - '#size-cells' 178 - '#size-cells'
177 - nuvoton,sysgcr 179 - nuvoton,sysgcr
178 180
179 additionalProperties: false 181 additionalProperties: false
180 182
181 examples: 183 examples:
182 - | 184 - |
183 #include <dt-bindings/interrupt-controller 185 #include <dt-bindings/interrupt-controller/arm-gic.h>
184 #include <dt-bindings/gpio/gpio.h> 186 #include <dt-bindings/gpio/gpio.h>
185 187
186 soc { 188 soc {
187 #address-cells = <2>; 189 #address-cells = <2>;
188 #size-cells = <2>; 190 #size-cells = <2>;
189 191
190 pinctrl: pinctrl@f0010000 { 192 pinctrl: pinctrl@f0010000 {
191 compatible = "nuvoton,npcm845-pinctrl" 193 compatible = "nuvoton,npcm845-pinctrl";
192 ranges = <0x0 0x0 0xf0010000 0x8000>; 194 ranges = <0x0 0x0 0xf0010000 0x8000>;
193 #address-cells = <1>; 195 #address-cells = <1>;
194 #size-cells = <1>; 196 #size-cells = <1>;
195 nuvoton,sysgcr = <&gcr>; 197 nuvoton,sysgcr = <&gcr>;
196 198
197 gpio0: gpio@0 { 199 gpio0: gpio@0 {
198 gpio-controller; 200 gpio-controller;
199 #gpio-cells = <2>; 201 #gpio-cells = <2>;
200 reg = <0x0 0xb0>; 202 reg = <0x0 0xb0>;
201 interrupts = <GIC_SPI 116 IRQ_TYPE_L 203 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
202 gpio-ranges = <&pinctrl 0 0 32>; 204 gpio-ranges = <&pinctrl 0 0 32>;
203 }; 205 };
204 206
205 fanin0_pin: fanin0-mux { 207 fanin0_pin: fanin0-mux {
206 groups = "fanin0"; 208 groups = "fanin0";
207 function = "fanin0"; 209 function = "fanin0";
208 }; 210 };
209 211
210 pin34_slew: pin34-slew { 212 pin34_slew: pin34-slew {
211 pins = "GPIO34/I3C4_SDA"; 213 pins = "GPIO34/I3C4_SDA";
212 bias-disable; 214 bias-disable;
213 }; 215 };
214 }; 216 };
215 }; 217 };
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