1 # SPDX-License-Identifier: (GPL-2.0-only OR BS
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/nvi
5 $schema: http://devicetree.org/meta-schemas/co
6
7 title: NVIDIA Tegra114 pinmux Controller
8
9 maintainers:
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
12
13 properties:
14 compatible:
15 const: nvidia,tegra114-pinmux
16
17 reg:
18 items:
19 - description: pad control registers
20 - description: mux registers
21
22 patternProperties:
23 "^pinmux(-[a-z0-9-_]+)?$":
24 type: object
25
26 # pin groups
27 additionalProperties:
28 $ref: nvidia,tegra-pinmux-common.yaml
29 additionalProperties: false
30 properties:
31 nvidia,pins:
32 items:
33 enum: [ ulpi_data0_po1, ulpi_data1
34 ulpi_data3_po4, ulpi_data4
35 ulpi_data6_po7, ulpi_data7
36 ulpi_nxt_py2, ulpi_stp_py3
37 dap3_dout_pp2, dap3_sclk_p
38 sdmmc1_cmd_pz1, sdmmc1_dat
39 sdmmc1_dat1_py6, sdmmc1_da
40 clk2_req_pcc5, hdmi_int_pn
41 uart2_rxd_pc3, uart2_txd_p
42 uart2_cts_n_pj5, uart3_txd
43 uart3_cts_n_pa1, uart3_rts
44 pu5, pu6, gen1_i2c_sda_pc5
45 dap4_din_pp5, dap4_dout_pp
46 clk3_req_pee1, gmi_wp_n_pc
47 gmi_adv_n_pk0, gmi_clk_pk1
48 gmi_cs2_n_pk3, gmi_cs3_n_p
49 gmi_cs7_n_pi6, gmi_ad0_pg0
50 gmi_ad3_pg3, gmi_ad4_pg4,
51 gmi_ad7_pg7, gmi_ad8_ph0,
52 gmi_ad11_ph3, gmi_ad12_ph4
53 gmi_ad15_ph7, gmi_a16_pj7,
54 gmi_a19_pk7, gmi_wr_n_pi0,
55 gmi_rst_n_pi4, gen2_i2c_sc
56 sdmmc4_clk_pcc4, sdmmc4_cm
57 sdmmc4_dat1_paa1, sdmmc4_d
58 sdmmc4_dat4_paa4, sdmmc4_d
59 sdmmc4_dat7_paa7, cam_mclk
60 cam_i2c_scl_pbb1, cam_i2c_
61 pbb7, pcc2, pwr_i2c_scl_pz
62 kb_row1_pr1, kb_row2_pr2,
63 kb_row5_pr5, kb_row6_pr6,
64 kb_row9_ps1, kb_row10_ps2,
65 kb_col2_pq2, kb_col3_pq3,
66 kb_col6_pq6, kb_col7_pq7,
67 core_pwr_req, cpu_pwr_req,
68 dap1_din_pn1, dap1_dout_pn
69 clk1_out_pw4, spdif_in_pk6
70 dap2_din_pa4, dap2_dout_pa
71 gpio_x1_aud_px1, gpio_x3_a
72 gpio_x4_aud_px4, gpio_x5_a
73 gpio_x7_aud_px7, sdmmc3_cl
74 sdmmc3_dat0_pb7, sdmmc3_da
75 sdmmc3_dat3_pb4, hdmi_cec_
76 sdmmc3_cd_n_pv2, gpio_w2_a
77 usb_vbus_en0_pn4, usb_vbus
78 sdmmc3_clk_lb_out_pee4, re
79 # drive groups
80 drive_ao1, drive_ao2, driv
81 drive_at4, drive_at5, driv
82 drive_dap2, drive_dap3, dr
83 drive_spi, drive_uaa, driv
84 drive_sdio1, drive_ddc, dr
85 drive_gmg, drive_gmh, driv
86
87 nvidia,function:
88 enum: [ blink, cec, cldvfs, clk12, c
89 displaya, displaya_alt, disp
90 extperiph2, extperiph3, gmi,
91 i2c3, i2c4, i2cpwr, i2s0, i2
92 nand, nand_alt, owr, pmi, pw
93 reset_out_n, rsvd1, rsvd2, r
94 sdmmc3, sdmmc4, soc, spdif,
95 spi6, sysclk, trace, uarta,
96 vgp1, vgp2, vgp3, vgp4, vgp5
97
98 nvidia,pull: true
99 nvidia,tristate: true
100 nvidia,schmitt: true
101 nvidia,pull-down-strength: true
102 nvidia,pull-up-strength: true
103 nvidia,high-speed-mode: true
104 nvidia,low-power-mode: true
105 nvidia,enable-input: true
106 nvidia,open-drain: true
107 nvidia,lock: true
108 nvidia,io-reset: true
109 nvidia,rcv-sel: true
110 nvidia,drive-type: true
111 nvidia,slew-rate-rising: true
112 nvidia,slew-rate-falling: true
113
114 required:
115 - nvidia,pins
116
117 additionalProperties: false
118
119 required:
120 - compatible
121 - reg
122
123 examples:
124 - |
125 pinmux@70000868 {
126 compatible = "nvidia,tegra114-pinmux";
127 reg = <0x70000868 0x148>, /* Pad contr
128 <0x70003000 0x40c>; /* PinMux re
129
130 pinmux {
131 sdmmc4_clk_pcc4 {
132 nvidia,pins = "sdmmc4_clk_pcc4
133 nvidia,function = "sdmmc4";
134 nvidia,pull = <0>;
135 nvidia,tristate = <0>;
136 };
137
138 sdmmc4_dat0_paa0 {
139 nvidia,pins = "sdmmc4_dat0_paa
140 "sdmmc4_dat1_paa
141 "sdmmc4_dat2_paa
142 "sdmmc4_dat3_paa
143 "sdmmc4_dat4_paa
144 "sdmmc4_dat5_paa
145 "sdmmc4_dat6_paa
146 "sdmmc4_dat7_paa
147 nvidia,function = "sdmmc4";
148 nvidia,pull = <2>;
149 nvidia,tristate = <0>;
150 };
151 };
152 };
153 ...
Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.