1 == Introduction == 1 == Introduction ==
2 2
3 Hardware modules that control pin multiplexing 3 Hardware modules that control pin multiplexing or configuration parameters
4 such as pull-up/down, tri-state, drive-strengt 4 such as pull-up/down, tri-state, drive-strength etc are designated as pin
5 controllers. Each pin controller must be repre 5 controllers. Each pin controller must be represented as a node in device tree,
6 just like any other hardware module. 6 just like any other hardware module.
7 7
8 Hardware modules whose signals are affected by 8 Hardware modules whose signals are affected by pin configuration are
9 designated client devices. Again, each client 9 designated client devices. Again, each client device must be represented as a
10 node in device tree, just like any other hardw 10 node in device tree, just like any other hardware module.
11 11
12 For a client device to operate correctly, cert 12 For a client device to operate correctly, certain pin controllers must
13 set up certain specific pin configurations. So 13 set up certain specific pin configurations. Some client devices need a
14 single static pin configuration, e.g. set up d 14 single static pin configuration, e.g. set up during initialization. Others
15 need to reconfigure pins at run-time, for exam 15 need to reconfigure pins at run-time, for example to tri-state pins when the
16 device is inactive. Hence, each client device 16 device is inactive. Hence, each client device can define a set of named
17 states. The number and names of those states i 17 states. The number and names of those states is defined by the client device's
18 own binding. 18 own binding.
19 19
20 The common pinctrl bindings defined in this fi 20 The common pinctrl bindings defined in this file provide an infrastructure
21 for client device device tree nodes to map tho 21 for client device device tree nodes to map those state names to the pin
22 configuration used by those states. 22 configuration used by those states.
23 23
24 Note that pin controllers themselves may also 24 Note that pin controllers themselves may also be client devices of themselves.
25 For example, a pin controller may set up its o 25 For example, a pin controller may set up its own "active" state when the
26 driver loads. This would allow representing a 26 driver loads. This would allow representing a board's static pin configuration
27 in a single place, rather than splitting it ac 27 in a single place, rather than splitting it across multiple client device
28 nodes. The decision to do this or not somewhat 28 nodes. The decision to do this or not somewhat rests with the author of
29 individual board device tree files, and any re 29 individual board device tree files, and any requirements imposed by the
30 bindings for the individual client devices in 30 bindings for the individual client devices in use by that board, i.e. whether
31 they require certain specific named states for 31 they require certain specific named states for dynamic pin configuration.
32 32
33 == Pinctrl client devices == 33 == Pinctrl client devices ==
34 34
35 For each client device individually, every pin 35 For each client device individually, every pin state is assigned an integer
36 ID. These numbers start at 0, and are contiguo 36 ID. These numbers start at 0, and are contiguous. For each state ID, a unique
37 property exists to define the pin configuratio 37 property exists to define the pin configuration. Each state may also be
38 assigned a name. When names are used, another 38 assigned a name. When names are used, another property exists to map from
39 those names to the integer IDs. 39 those names to the integer IDs.
40 40
41 Each client device's own binding determines th 41 Each client device's own binding determines the set of states that must be
42 defined in its device tree node, and whether t 42 defined in its device tree node, and whether to define the set of state
43 IDs that must be provided, or whether to defin 43 IDs that must be provided, or whether to define the set of state names that
44 must be provided. 44 must be provided.
45 45
46 Required properties: 46 Required properties:
47 pinctrl-0: List of phandles, each pointin 47 pinctrl-0: List of phandles, each pointing at a pin configuration
48 node. These referenced pin con 48 node. These referenced pin configuration nodes must be child
49 nodes of the pin controller th 49 nodes of the pin controller that they configure. Multiple
50 entries may exist in this list 50 entries may exist in this list so that multiple pin
51 controllers may be configured, 51 controllers may be configured, or so that a state may be built
52 from multiple nodes for a sing 52 from multiple nodes for a single pin controller, each
53 contributing part of the overa 53 contributing part of the overall configuration. See the next
54 section of this document for d 54 section of this document for details of the format of these
55 pin configuration nodes. 55 pin configuration nodes.
56 56
57 In some cases, it may be usefu 57 In some cases, it may be useful to define a state, but for it
58 to be empty. This may be requi 58 to be empty. This may be required when a common IP block is
59 used in an SoC either without 59 used in an SoC either without a pin controller, or where the
60 pin controller does not affect 60 pin controller does not affect the HW module in question. If
61 the binding for that IP block 61 the binding for that IP block requires certain pin states to
62 exist, they must still be defi 62 exist, they must still be defined, but may be left empty.
63 63
64 Optional properties: 64 Optional properties:
65 pinctrl-1: List of phandles, each pointin 65 pinctrl-1: List of phandles, each pointing at a pin configuration
66 node within a pin controller. 66 node within a pin controller.
67 ... 67 ...
68 pinctrl-n: List of phandles, each pointin 68 pinctrl-n: List of phandles, each pointing at a pin configuration
69 node within a pin controller. 69 node within a pin controller.
70 pinctrl-names: The list of names to assign st 70 pinctrl-names: The list of names to assign states. List entry 0 defines the
71 name for integer state ID 0, l 71 name for integer state ID 0, list entry 1 for state ID 1, and
72 so on. 72 so on.
73 73
74 For example: 74 For example:
75 75
76 /* For a client device requiring named 76 /* For a client device requiring named states */
77 device { 77 device {
78 pinctrl-names = "active", "idl 78 pinctrl-names = "active", "idle";
79 pinctrl-0 = <&state_0_node_a>; 79 pinctrl-0 = <&state_0_node_a>;
80 pinctrl-1 = <&state_1_node_a>, 80 pinctrl-1 = <&state_1_node_a>, <&state_1_node_b>;
81 }; 81 };
82 82
83 /* For the same device if using state 83 /* For the same device if using state IDs */
84 device { 84 device {
85 pinctrl-0 = <&state_0_node_a>; 85 pinctrl-0 = <&state_0_node_a>;
86 pinctrl-1 = <&state_1_node_a>, 86 pinctrl-1 = <&state_1_node_a>, <&state_1_node_b>;
87 }; 87 };
88 88
89 /* 89 /*
90 * For an IP block whose binding suppo 90 * For an IP block whose binding supports pin configuration,
91 * but in use on an SoC that doesn't h 91 * but in use on an SoC that doesn't have any pin control hardware
92 */ 92 */
93 device { 93 device {
94 pinctrl-names = "active", "idl 94 pinctrl-names = "active", "idle";
95 pinctrl-0 = <>; 95 pinctrl-0 = <>;
96 pinctrl-1 = <>; 96 pinctrl-1 = <>;
97 }; 97 };
98 98
99 == Pin controller devices == 99 == Pin controller devices ==
100 100
101 See pinctrl.yaml 101 See pinctrl.yaml
102 102
103 == Generic pin multiplexing node content == 103 == Generic pin multiplexing node content ==
104 104
105 See pinmux-node.yaml 105 See pinmux-node.yaml
106 106
107 == Generic pin configuration node content == 107 == Generic pin configuration node content ==
108 108
109 See pincfg-node.yaml 109 See pincfg-node.yaml
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