1 # SPDX-License-Identifier: GPL-2.0-only
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/pin
5 $schema: http://devicetree.org/meta-schemas/co
6
7 title: Generic Pin Multiplexing Node
8
9 maintainers:
10 - Linus Walleij <linus.walleij@linaro.org>
11
12 description: |
13 The contents of the pin configuration child
14 for the individual pin controller device. Th
15 be direct children of the pin controller dev
16 for example. Whether this is legal, and whet
17 between the child and intermediate parent no
18 the binding for the individual pin controlle
19
20 While not required to be used, there are 3 g
21 which pin controller devices can use.
22
23 pin multiplexing nodes:
24
25 Example:
26
27 state_0_node_a {
28 uart0 {
29 function = "uart0";
30 groups = "u0rxtx", "u0rtscts";
31 };
32 };
33 state_1_node_a {
34 spi {
35 function = "spi0";
36 groups = "spi0pins";
37 };
38 };
39 state_2_node_a {
40 function = "i2c0";
41 pins = "mfio29", "mfio30";
42 };
43
44 Optionally an alternative binding can be use
45 pin controller hardware. For hardware where
46 pin controller instances, naming each pin an
47 unmaintainable. This is especially the case
48 different pins and functions depending on th
49
50 For cases like this, the pin controller driv
51 binding with a hardware based index and a nu
52
53 pincontroller {
54 ... /* Standard DT properties for the devi
55 #pinctrl-cells = <2>;
56
57 state_0_node_a {
58 pinctrl-pin-array = <
59 0 A_DELAY_PS(0) G_DELAY_PS(120)
60 4 A_DELAY_PS(0) G_DELAY_PS(360)
61 ...
62 >;
63 };
64 ...
65 };
66
67 Above #pinctrl-cells specifies the number of
68 index of the registers. This is similar to t
69 one exception. There is no need to specify t
70 is already known as the defined pins are alw
71 node. Further having the phandle pointing to
72 currently work as the pinctrl framework uses
73 pin control device.
74
75 The index for pinctrl-pin-array must relate
76 registers, and must not be a virtual index o
77 this is to avoid mapping of the index in the
78 driver as it can change.
79
80 For hardware where pin multiplexing configur
81 each single pin the number of required sub-n
82 "function" properties can quickly escalate a
83 maintain.
84
85 For cases like this, the pin controller driv
86 property, where the pin identifier is provid
87 in a pinmux group. A pinmux group consists o
88 settings represented as a single integer or
89
90 The pinmux property accepts an array of pinm
91 a single pin multiplexing configuration.
92
93 pincontroller {
94 state_0_node_a {
95 pinmux = <PINMUX_GROUP>, <PINMUX_GROUP>,
96 };
97 };
98
99 Each individual pin controller driver bindin
100 how pin IDs and pin multiplexing configurati
101 together in a pinmux group.
102
103 properties:
104 function:
105 $ref: /schemas/types.yaml#/definitions/str
106 description: The mux function to select
107
108 pins:
109 oneOf:
110 - $ref: /schemas/types.yaml#/definitions
111 - $ref: /schemas/types.yaml#/definitions
112 description:
113 The list of pin identifiers that propert
114 specific binding for the hardware define
115 or strings, and their meaning.
116
117 groups:
118 $ref: /schemas/types.yaml#/definitions/str
119 description:
120 the group to apply the properties to, if
121 configuration of whole groups rather tha
122 this, "pins" or "pinmux" has to be speci
123
124 pinmux:
125 description:
126 The list of numeric pin ids and their mu
127 node apply to (either this, "pins" or "g
128 $ref: /schemas/types.yaml#/definitions/uin
129
130 pinctrl-pin-array:
131 $ref: /schemas/types.yaml#/definitions/uin
132
133 additionalProperties: true
Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.