1 # SPDX-License-Identifier: (GPL-2.0-only OR BS 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qco 4 $id: http://devicetree.org/schemas/pinctrl/qcom,mdm9607-tlmm.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: Qualcomm Technologies, Inc. MDM9607 TLM 7 title: Qualcomm Technologies, Inc. MDM9607 TLMM block
8 8
9 maintainers: 9 maintainers:
10 - Konrad Dybcio <konradybcio@kernel.org> !! 10 - Konrad Dybcio <konrad.dybcio@somainline.org>
11 11
12 description: 12 description:
13 Top Level Mode Multiplexer pin controller in 13 Top Level Mode Multiplexer pin controller in Qualcomm MDM9607 SoC.
14 14
15 allOf: 15 allOf:
16 - $ref: /schemas/pinctrl/qcom,tlmm-common.ya 16 - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
17 17
18 properties: 18 properties:
19 compatible: 19 compatible:
20 const: qcom,mdm9607-tlmm 20 const: qcom,mdm9607-tlmm
21 21
22 reg: 22 reg:
23 maxItems: 1 23 maxItems: 1
24 24
25 interrupts: 25 interrupts:
26 maxItems: 1 26 maxItems: 1
27 27
>> 28 interrupt-controller: true
>> 29 "#interrupt-cells": true
>> 30 gpio-controller: true
28 gpio-reserved-ranges: true 31 gpio-reserved-ranges: true
>> 32 "#gpio-cells": true
>> 33 gpio-ranges: true
>> 34 wakeup-parent: true
>> 35
>> 36 required:
>> 37 - compatible
>> 38 - reg
>> 39
>> 40 additionalProperties: false
29 41
30 patternProperties: 42 patternProperties:
31 "-state$": 43 "-state$":
32 oneOf: 44 oneOf:
33 - $ref: "#/$defs/qcom-mdm9607-tlmm-state 45 - $ref: "#/$defs/qcom-mdm9607-tlmm-state"
34 - additionalProperties: false !! 46 - patternProperties:
35 patternProperties: <<
36 ".*": 47 ".*":
37 $ref: "#/$defs/qcom-mdm9607-tlmm-s 48 $ref: "#/$defs/qcom-mdm9607-tlmm-state"
38 49
39 $defs: 50 $defs:
40 qcom-mdm9607-tlmm-state: 51 qcom-mdm9607-tlmm-state:
41 type: object 52 type: object
42 description: 53 description:
43 Pinctrl node's client devices use subnod 54 Pinctrl node's client devices use subnodes for desired pin configuration.
44 Client device subnodes use below standar 55 Client device subnodes use below standard properties.
45 $ref: qcom,tlmm-common.yaml#/$defs/qcom-tl 56 $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
46 unevaluatedProperties: false <<
47 57
48 properties: 58 properties:
49 pins: 59 pins:
50 description: 60 description:
51 List of gpio pins affected by the pr 61 List of gpio pins affected by the properties specified in this
52 subnode. 62 subnode.
53 items: 63 items:
54 oneOf: 64 oneOf:
55 - pattern: "^gpio([1-9]|[1-7][0-9] 65 - pattern: "^gpio([1-9]|[1-7][0-9]|80)$"
56 - enum: [ sdc1_clk, sdc1_cmd, sdc1 66 - enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk, sdc2_cmd,
57 sdc2_data, qdsd_cmd, qds 67 sdc2_data, qdsd_cmd, qdsd_data0, qdsd_data1, qdsd_data2,
58 qdsd_data3 ] 68 qdsd_data3 ]
59 minItems: 1 69 minItems: 1
60 maxItems: 16 70 maxItems: 16
61 71
62 function: 72 function:
63 description: 73 description:
64 Specify the alternative function to 74 Specify the alternative function to be configured for the specified
65 pins. 75 pins.
66 76
67 enum: [ adsp_ext, atest_bbrx0, atest_b 77 enum: [ adsp_ext, atest_bbrx0, atest_bbrx1, atest_char, atest_char0,
68 atest_char1, atest_char2, ates 78 atest_char1, atest_char2, atest_char3,
69 atest_combodac_to_gpio_native, 79 atest_combodac_to_gpio_native, atest_gpsadc_dtest0_native,
70 atest_gpsadc_dtest1_native, at 80 atest_gpsadc_dtest1_native, atest_tsens, backlight_en_b,
71 bimc_dte0, bimc_dte1, blsp1_sp 81 bimc_dte0, bimc_dte1, blsp1_spi, blsp2_spi, blsp3_spi,
72 blsp_i2c1, blsp_i2c2, blsp_i2c 82 blsp_i2c1, blsp_i2c2, blsp_i2c3, blsp_i2c4, blsp_i2c5,
73 blsp_i2c6, blsp_spi1, blsp_spi 83 blsp_i2c6, blsp_spi1, blsp_spi2, blsp_spi3, blsp_spi4,
74 blsp_spi5, blsp_spi6, blsp_uar 84 blsp_spi5, blsp_spi6, blsp_uart1, blsp_uart2, blsp_uart3,
75 blsp_uart4, blsp_uart5, blsp_u 85 blsp_uart4, blsp_uart5, blsp_uart6, blsp_uim1, blsp_uim2,
76 codec_int, codec_rst, coex_uar 86 codec_int, codec_rst, coex_uart, cri_trng, cri_trng0,
77 cri_trng1, dbg_out, ebi0_wrcdc 87 cri_trng1, dbg_out, ebi0_wrcdc, ebi2_a, ebi2_a_d_8_b,
78 ebi2_lcd, ebi2_lcd_cs_n_b, ebi 88 ebi2_lcd, ebi2_lcd_cs_n_b, ebi2_lcd_te_b, eth_irq, eth_rst,
79 gcc_gp1_clk_a, gcc_gp1_clk_b, 89 gcc_gp1_clk_a, gcc_gp1_clk_b, gcc_gp2_clk_a, gcc_gp2_clk_b,
80 gcc_gp3_clk_a, gcc_gp3_clk_b, 90 gcc_gp3_clk_a, gcc_gp3_clk_b, gcc_plltest, gcc_tlmm, gmac_mdio,
81 gpio, gsm0_tx, lcd_rst, ldo_en 91 gpio, gsm0_tx, lcd_rst, ldo_en, ldo_update, m_voc, modem_tsync,
82 nav_ptp_pps_in_a, nav_ptp_pps_ 92 nav_ptp_pps_in_a, nav_ptp_pps_in_b, nav_tsync_out_a,
83 nav_tsync_out_b, pa_indicator, 93 nav_tsync_out_b, pa_indicator, pbs0, pbs1, pbs2,
84 pri_mi2s_data0_a, pri_mi2s_dat 94 pri_mi2s_data0_a, pri_mi2s_data1_a, pri_mi2s_mclk_a,
85 pri_mi2s_sck_a, pri_mi2s_ws_a, 95 pri_mi2s_sck_a, pri_mi2s_ws_a, prng_rosc, ptp_pps_out_a,
86 ptp_pps_out_b, pwr_crypto_enab 96 ptp_pps_out_b, pwr_crypto_enabled_a, pwr_crypto_enabled_b,
87 pwr_modem_enabled_a, pwr_modem 97 pwr_modem_enabled_a, pwr_modem_enabled_b, pwr_nav_enabled_a,
88 pwr_nav_enabled_b, qdss_cti_tr 98 pwr_nav_enabled_b, qdss_cti_trig_in_a0, qdss_cti_trig_in_a1,
89 qdss_cti_trig_in_b0, qdss_cti_ 99 qdss_cti_trig_in_b0, qdss_cti_trig_in_b1, qdss_cti_trig_out_a0,
90 qdss_cti_trig_out_a1, qdss_cti 100 qdss_cti_trig_out_a1, qdss_cti_trig_out_b0, qdss_cti_trig_out_b1,
91 qdss_traceclk_a, qdss_traceclk 101 qdss_traceclk_a, qdss_traceclk_b, qdss_tracectl_a,
92 qdss_tracectl_b, qdss_tracedat 102 qdss_tracectl_b, qdss_tracedata_a, qdss_tracedata_b, rcm_marker1,
93 rcm_marker2, sd_write, sec_mi2 103 rcm_marker2, sd_write, sec_mi2s, sensor_en, sensor_int2,
94 sensor_int3, sensor_rst, ssbi1 104 sensor_int3, sensor_rst, ssbi1, ssbi2, touch_rst, ts_int,
95 uim1_clk, uim1_data, uim1_pres 105 uim1_clk, uim1_data, uim1_present, uim1_reset, uim2_clk,
96 uim2_data, uim2_present, uim2_ 106 uim2_data, uim2_present, uim2_reset, uim_batt, wlan_en1, ]
97 107
>> 108 bias-disable: true
>> 109 bias-pull-down: true
>> 110 bias-pull-up: true
>> 111 drive-strength: true
>> 112 input-enable: true
>> 113 output-high: true
>> 114 output-low: true
>> 115
98 required: 116 required:
99 - pins 117 - pins
100 118
101 required: !! 119 additionalProperties: false
102 - compatible <<
103 - reg <<
104 <<
105 unevaluatedProperties: false <<
106 120
107 examples: 121 examples:
108 - | 122 - |
109 #include <dt-bindings/interrupt-controller 123 #include <dt-bindings/interrupt-controller/arm-gic.h>
110 tlmm: pinctrl@1000000 { 124 tlmm: pinctrl@1000000 {
111 compatible = "qcom,mdm9607-tlmm"; 125 compatible = "qcom,mdm9607-tlmm";
112 reg = <0x01000000 0x300000>; 126 reg = <0x01000000 0x300000>;
113 interrupts = <GIC_SPI 208 IRQ_TYPE_LEV 127 interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
114 gpio-controller; 128 gpio-controller;
115 gpio-ranges = <&msmgpio 0 0 80>; 129 gpio-ranges = <&msmgpio 0 0 80>;
116 #gpio-cells = <2>; 130 #gpio-cells = <2>;
117 interrupt-controller; 131 interrupt-controller;
118 #interrupt-cells = <2>; 132 #interrupt-cells = <2>;
119 }; 133 };
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