1 # SPDX-License-Identifier: (GPL-2.0-only OR BS
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qco
5 $schema: http://devicetree.org/meta-schemas/co
6
7 title: Qualcomm Technologies, Inc. MSM8953 TLM
8
9 maintainers:
10 - Bjorn Andersson <bjorn.andersson@linaro.org
11
12 description:
13 Top Level Mode Multiplexer pin controller in
14
15 properties:
16 compatible:
17 const: qcom,msm8953-pinctrl
18
19 reg:
20 maxItems: 1
21
22 interrupts:
23 maxItems: 1
24
25 gpio-reserved-ranges: true
26
27 patternProperties:
28 "-state$":
29 oneOf:
30 - $ref: "#/$defs/qcom-msm8953-tlmm-state
31 - patternProperties:
32 "-pins$":
33 $ref: "#/$defs/qcom-msm8953-tlmm-s
34 additionalProperties: false
35
36 $defs:
37 qcom-msm8953-tlmm-state:
38 type: object
39 description:
40 Pinctrl node's client devices use subnod
41 Client device subnodes use below standar
42 $ref: qcom,tlmm-common.yaml#/$defs/qcom-tl
43 unevaluatedProperties: false
44
45 properties:
46 pins:
47 description:
48 List of gpio pins affected by the pr
49 subnode.
50 items:
51 oneOf:
52 - pattern: "^gpio([0-9]|[1-9][0-9]
53 - enum: [ sdc1_clk, sdc1_cmd, sdc1
54 sdc2_cmd, sdc2_data, qds
55 qdsd_data1, qdsd_data2,
56 minItems: 1
57 maxItems: 16
58
59 function:
60 description:
61 Specify the alternative function to
62 pins.
63
64 enum: [ accel_int, adsp_ext, alsp_int,
65 atest_char, atest_char0, atest
66 atest_gpsadc_dtest0_native, at
67 atest_wlan0, atest_wlan1, bimc
68 blsp3_spi, blsp6_spi, blsp7_sp
69 blsp_i2c4, blsp_i2c5, blsp_i2c
70 blsp_spi2, blsp_spi3, blsp_spi
71 blsp_spi8, blsp_uart2, blsp_ua
72 cam1_ldo, cam1_rst, cam1_stand
73 cam3_standby, cam_irq, cam_mcl
74 cci_timer0, cci_timer1, cci_ti
75 cdc_pdm0, codec_int1, codec_in
76 cri_trng1, dac_calib0, dac_cal
77 dac_calib12, dac_calib13, dac_
78 dac_calib17, dac_calib18, dac_
79 dac_calib21, dac_calib22, dac_
80 dac_calib3, dac_calib4, dac_ca
81 dac_calib8, dac_calib9, dbg_ou
82 ebi_cdc, ebi_ch0, ext_lpass, f
83 gcc_gp1_clk_b, gcc_gp2_clk_a,
84 gcc_gp3_clk_b, gcc_plltest, gc
85 gyro_int, hall_int, hdmi_int,
86 key_volp, ldo_en, ldo_update,
87 lpass_slimbus1, m_voc, mag_int
88 mss_lte, nav_pps, nav_pps_in_a
89 nfc_disable, nfc_dwl, nfc_irq,
90 pbs2, pressure_int, pri_mi2s,
91 pri_mi2s_ws, prng_rosc, pwr_cr
92 pwr_down, pwr_modem_enabled_a,
93 pwr_nav_enabled_a, pwr_nav_ena
94 qdss_cti_trig_in_a1, qdss_cti_
95 qdss_cti_trig_out_a0, qdss_cti
96 qdss_cti_trig_out_b1, qdss_tra
97 qdss_tracectl_a, qdss_tracectl
98 qdss_tracedata_b, sd_write, sd
99 sec_mi2s_mclk_b, smb_int, ss_s
100 ts_sample, ts_xvdd, tsens_max,
101 uim1_reset, uim2_clk, uim2_dat
102 uim_batt, us_emitter, us_euro,
103 wcss_wlan0, wcss_wlan1, wcss_w
104
105 required:
106 - pins
107
108 allOf:
109 - $ref: /schemas/pinctrl/qcom,tlmm-common.ya
110
111 required:
112 - compatible
113 - reg
114
115 unevaluatedProperties: false
116
117 examples:
118 - |
119 #include <dt-bindings/interrupt-controller
120 tlmm: pinctrl@1000000 {
121 compatible = "qcom,msm8953-pinctrl";
122 reg = <0x01000000 0x300000>;
123 interrupts = <GIC_SPI 208 IRQ_TYPE_LEV
124 interrupt-controller;
125 #interrupt-cells = <2>;
126 gpio-controller;
127 #gpio-cells = <2>;
128 gpio-ranges = <&tlmm 0 0 142>;
129
130 serial_default: serial-state {
131 pins = "gpio4", "gpio5";
132 function = "blsp_uart2";
133 drive-strength = <2>;
134 bias-disable;
135 };
136 };
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