1 # SPDX-License-Identifier: (GPL-2.0-only OR BS 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qco 4 $id: http://devicetree.org/schemas/pinctrl/qcom,sc7280-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: Qualcomm Technologies, Inc. SC7280 TLMM 7 title: Qualcomm Technologies, Inc. SC7280 TLMM block
8 8
9 maintainers: 9 maintainers:
10 - Bjorn Andersson <andersson@kernel.org> !! 10 - Rajendra Nayak <rnayak@codeaurora.org>
11 11
12 description: !! 12 description: |
13 Top Level Mode Multiplexer pin controller in !! 13 This binding describes the Top Level Mode Multiplexer block found in the
>> 14 SC7280 platform.
14 15
15 properties: 16 properties:
16 compatible: 17 compatible:
17 const: qcom,sc7280-pinctrl 18 const: qcom,sc7280-pinctrl
18 19
19 reg: 20 reg:
20 maxItems: 1 21 maxItems: 1
21 22
22 interrupts: 23 interrupts:
23 description: Specifies the TLMM summary IR 24 description: Specifies the TLMM summary IRQ
24 maxItems: 1 25 maxItems: 1
25 26
26 gpio-reserved-ranges: !! 27 interrupt-controller: true
27 minItems: 1 <<
28 maxItems: 88 <<
29 28
30 gpio-line-names: !! 29 '#interrupt-cells':
31 maxItems: 175 !! 30 description:
>> 31 Specifies the PIN numbers and Flags, as defined in defined in
>> 32 include/dt-bindings/interrupt-controller/irq.h
>> 33 const: 2
>> 34
>> 35 gpio-controller: true
>> 36
>> 37 '#gpio-cells':
>> 38 description: Specifying the pin number and flags, as defined in
>> 39 include/dt-bindings/gpio/gpio.h
>> 40 const: 2
32 41
33 patternProperties: !! 42 gpio-ranges:
34 "-state$": !! 43 maxItems: 1
35 oneOf: !! 44
36 - $ref: "#/$defs/qcom-sc7280-tlmm-state" !! 45 wakeup-parent: true
37 - patternProperties: <<
38 "-pins$": <<
39 $ref: "#/$defs/qcom-sc7280-tlmm-st <<
40 additionalProperties: false <<
41 46
42 $defs: !! 47 #PIN CONFIGURATION NODES
43 qcom-sc7280-tlmm-state: !! 48 patternProperties:
>> 49 '-pins$':
44 type: object 50 type: object
45 description: 51 description:
46 Pinctrl node's client devices use subnod 52 Pinctrl node's client devices use subnodes for desired pin configuration.
47 Client device subnodes use below standar 53 Client device subnodes use below standard properties.
48 $ref: qcom,tlmm-common.yaml#/$defs/qcom-tl !! 54 $ref: "/schemas/pinctrl/pincfg-node.yaml"
49 unevaluatedProperties: false <<
50 55
51 properties: 56 properties:
52 pins: 57 pins:
53 description: 58 description:
54 List of gpio pins affected by the pr 59 List of gpio pins affected by the properties specified in this
55 subnode. 60 subnode.
56 items: 61 items:
57 oneOf: 62 oneOf:
58 - pattern: "^gpio([0-9]|[1-9][0-9] !! 63 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-7][0-4])$"
59 - enum: [ sdc1_rclk, sdc1_clk, sdc 64 - enum: [ sdc1_rclk, sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk,
60 sdc2_cmd, sdc2_data, ufs 65 sdc2_cmd, sdc2_data, ufs_reset ]
61 minItems: 1 66 minItems: 1
62 maxItems: 16 67 maxItems: 16
63 68
64 function: 69 function:
65 description: 70 description:
66 Specify the alternative function to 71 Specify the alternative function to be configured for the specified
67 pins. 72 pins.
68 73
69 enum: [ atest_char, atest_char0, atest 74 enum: [ atest_char, atest_char0, atest_char1, atest_char2,
70 atest_char3, atest_usb0, atest 75 atest_char3, atest_usb0, atest_usb00, atest_usb01,
71 atest_usb02, atest_usb03, ates 76 atest_usb02, atest_usb03, atest_usb1, atest_usb10,
72 atest_usb11, atest_usb12, ates 77 atest_usb11, atest_usb12, atest_usb13, audio_ref,
73 cam_mclk, cci_async, cci_i2c, 78 cam_mclk, cci_async, cci_i2c, cci_timer0, cci_timer1,
74 cci_timer2, cci_timer3, cci_ti 79 cci_timer2, cci_timer3, cci_timer4, cmu_rng0, cmu_rng1,
75 cmu_rng2, cmu_rng3, coex_uart1 80 cmu_rng2, cmu_rng3, coex_uart1, cri_trng, cri_trng0,
76 cri_trng1, dbg_out, ddr_bist, 81 cri_trng1, dbg_out, ddr_bist, ddr_pxi0, ddr_pxi1, dp_hot,
77 dp_lcd, edp_hot, edp_lcd, gcc_ 82 dp_lcd, edp_hot, edp_lcd, gcc_gp1, gcc_gp2, gcc_gp3,
78 gpio, host2wlan_sol, ibi_i3c, 83 gpio, host2wlan_sol, ibi_i3c, jitter_bist, lpass_slimbus,
79 mdp_vsync, mdp_vsync0, mdp_vsy 84 mdp_vsync, mdp_vsync0, mdp_vsync1, mdp_vsync2, mdp_vsync3,
80 mdp_vsync4, mdp_vsync5, mi2s0_ 85 mdp_vsync4, mdp_vsync5, mi2s0_data0, mi2s0_data1, mi2s0_sck,
81 mi2s0_ws, mi2s1_data0, mi2s1_d 86 mi2s0_ws, mi2s1_data0, mi2s1_data1, mi2s1_sck, mi2s1_ws,
82 mi2s2_data0, mi2s2_data1, mi2s 87 mi2s2_data0, mi2s2_data1, mi2s2_sck, mi2s2_ws, mss_grfc0,
83 mss_grfc1, mss_grfc10, mss_grf 88 mss_grfc1, mss_grfc10, mss_grfc11, mss_grfc12, mss_grfc2,
84 mss_grfc3, mss_grfc4, mss_grfc 89 mss_grfc3, mss_grfc4, mss_grfc5, mss_grfc6, mss_grfc7,
85 mss_grfc8, mss_grfc9, nav_gpio 90 mss_grfc8, mss_grfc9, nav_gpio0, nav_gpio1, nav_gpio2,
86 pa_indicator, pcie0_clkreqn, p 91 pa_indicator, pcie0_clkreqn, pcie1_clkreqn, phase_flag,
87 pll_bist, pll_bypassnl, pll_cl 92 pll_bist, pll_bypassnl, pll_clk, pll_reset, pri_mi2s, prng_rosc,
88 qdss, qdss_cti, qlink0_enable, 93 qdss, qdss_cti, qlink0_enable, qlink0_request, qlink0_wmss,
89 qlink1_enable, qlink1_request, 94 qlink1_enable, qlink1_request, qlink1_wmss, qspi_clk, qspi_cs,
90 qspi_data, qup00, qup01, qup02 95 qspi_data, qup00, qup01, qup02, qup03, qup04, qup05, qup06, qup07,
91 qup10, qup11, qup12, qup13, qu 96 qup10, qup11, qup12, qup13, qup14, qup15, qup16, qup17,
92 sdc40, sdc41, sdc42, sdc43, sd 97 sdc40, sdc41, sdc42, sdc43, sdc4_clk, sdc4_cmd, sd_write,
93 sec_mi2s, tb_trig, tgu_ch0, tg 98 sec_mi2s, tb_trig, tgu_ch0, tgu_ch1, tsense_pwm1,
94 tsense_pwm2, uim0_clk, uim0_da 99 tsense_pwm2, uim0_clk, uim0_data, uim0_present, uim0_reset,
95 uim1_clk, uim1_data, uim1_pres 100 uim1_clk, uim1_data, uim1_present, uim1_reset, usb2phy_ac,
96 usb_phy, vfr_0, vfr_1, vsense_ 101 usb_phy, vfr_0, vfr_1, vsense_trigger ]
97 102
>> 103 drive-strength:
>> 104 enum: [2, 4, 6, 8, 10, 12, 14, 16]
>> 105 default: 2
>> 106 description:
>> 107 Selects the drive strength for the specified pins, in mA.
>> 108
>> 109 bias-pull-down: true
>> 110
>> 111 bias-pull-up: true
>> 112
>> 113 bias-disable: true
>> 114
>> 115 output-high: true
>> 116
>> 117 output-low: true
>> 118
98 required: 119 required:
99 - pins 120 - pins
>> 121 - function
>> 122
>> 123 additionalProperties: false
100 124
101 allOf: 125 allOf:
102 - $ref: /schemas/pinctrl/qcom,tlmm-common.ya !! 126 - $ref: "pinctrl.yaml#"
103 127
104 required: 128 required:
105 - compatible 129 - compatible
106 - reg 130 - reg
>> 131 - interrupts
>> 132 - interrupt-controller
>> 133 - '#interrupt-cells'
>> 134 - gpio-controller
>> 135 - '#gpio-cells'
>> 136 - gpio-ranges
107 137
108 unevaluatedProperties: false !! 138 additionalProperties: false
109 139
110 examples: 140 examples:
111 - | 141 - |
112 #include <dt-bindings/interrupt-controller !! 142 #include <dt-bindings/interrupt-controller/arm-gic.h>
113 tlmm: pinctrl@f000000 { !! 143 tlmm: pinctrl@f000000 {
114 compatible = "qcom,sc7280-pinctrl"; !! 144 compatible = "qcom,sc7280-pinctrl";
115 reg = <0xf000000 0x1000000>; !! 145 reg = <0xf000000 0x1000000>;
116 interrupts = <GIC_SPI 208 IRQ_TYPE_LEV !! 146 interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
117 gpio-controller; !! 147 gpio-controller;
118 #gpio-cells = <2>; !! 148 #gpio-cells = <2>;
119 interrupt-controller; !! 149 interrupt-controller;
120 #interrupt-cells = <2>; !! 150 #interrupt-cells = <2>;
121 gpio-ranges = <&tlmm 0 0 175>; !! 151 gpio-ranges = <&tlmm 0 0 175>;
122 wakeup-parent = <&pdc>; !! 152 wakeup-parent = <&pdc>;
123 !! 153
124 qup_uart5_default: qup-uart5-state { !! 154 qup_uart5_default: qup-uart5-pins {
125 pins = "gpio46", "gpio47"; !! 155 pins = "gpio46", "gpio47";
126 function = "qup13"; !! 156 function = "qup13";
127 drive-strength = <2>; !! 157 drive-strength = <2>;
128 bias-disable; !! 158 bias-disable;
>> 159 };
129 }; 160 };
130 }; <<
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