1 # SPDX-License-Identifier: (GPL-2.0-only OR BS 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qco 4 $id: http://devicetree.org/schemas/pinctrl/qcom,sc7280-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: Qualcomm Technologies, Inc. SC7280 TLMM 7 title: Qualcomm Technologies, Inc. SC7280 TLMM block
8 8
9 maintainers: 9 maintainers:
10 - Bjorn Andersson <andersson@kernel.org> 10 - Bjorn Andersson <andersson@kernel.org>
11 11
12 description: 12 description:
13 Top Level Mode Multiplexer pin controller in 13 Top Level Mode Multiplexer pin controller in Qualcomm SC7280 SoC.
14 14
15 properties: 15 properties:
16 compatible: 16 compatible:
17 const: qcom,sc7280-pinctrl 17 const: qcom,sc7280-pinctrl
18 18
19 reg: 19 reg:
20 maxItems: 1 20 maxItems: 1
21 21
22 interrupts: 22 interrupts:
23 description: Specifies the TLMM summary IR 23 description: Specifies the TLMM summary IRQ
24 maxItems: 1 24 maxItems: 1
25 25
26 gpio-reserved-ranges: !! 26 interrupt-controller: true
27 minItems: 1 !! 27
28 maxItems: 88 !! 28 '#interrupt-cells':
>> 29 description:
>> 30 Specifies the PIN numbers and Flags, as defined in defined in
>> 31 include/dt-bindings/interrupt-controller/irq.h
>> 32 const: 2
>> 33
>> 34 gpio-controller: true
>> 35
>> 36 '#gpio-cells':
>> 37 description: Specifying the pin number and flags, as defined in
>> 38 include/dt-bindings/gpio/gpio.h
>> 39 const: 2
>> 40
>> 41 gpio-ranges:
>> 42 maxItems: 1
29 43
30 gpio-line-names: 44 gpio-line-names:
31 maxItems: 175 45 maxItems: 175
32 46
>> 47 wakeup-parent: true
>> 48
33 patternProperties: 49 patternProperties:
34 "-state$": 50 "-state$":
35 oneOf: 51 oneOf:
36 - $ref: "#/$defs/qcom-sc7280-tlmm-state" 52 - $ref: "#/$defs/qcom-sc7280-tlmm-state"
37 - patternProperties: 53 - patternProperties:
38 "-pins$": 54 "-pins$":
39 $ref: "#/$defs/qcom-sc7280-tlmm-st 55 $ref: "#/$defs/qcom-sc7280-tlmm-state"
40 additionalProperties: false 56 additionalProperties: false
41 57
42 $defs: 58 $defs:
43 qcom-sc7280-tlmm-state: 59 qcom-sc7280-tlmm-state:
44 type: object 60 type: object
45 description: 61 description:
46 Pinctrl node's client devices use subnod 62 Pinctrl node's client devices use subnodes for desired pin configuration.
47 Client device subnodes use below standar 63 Client device subnodes use below standard properties.
48 $ref: qcom,tlmm-common.yaml#/$defs/qcom-tl 64 $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
49 unevaluatedProperties: false <<
50 65
51 properties: 66 properties:
52 pins: 67 pins:
53 description: 68 description:
54 List of gpio pins affected by the pr 69 List of gpio pins affected by the properties specified in this
55 subnode. 70 subnode.
56 items: 71 items:
57 oneOf: 72 oneOf:
58 - pattern: "^gpio([0-9]|[1-9][0-9] 73 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-6][0-9]|17[0-4])$"
59 - enum: [ sdc1_rclk, sdc1_clk, sdc 74 - enum: [ sdc1_rclk, sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk,
60 sdc2_cmd, sdc2_data, ufs 75 sdc2_cmd, sdc2_data, ufs_reset ]
61 minItems: 1 76 minItems: 1
62 maxItems: 16 77 maxItems: 16
63 78
64 function: 79 function:
65 description: 80 description:
66 Specify the alternative function to 81 Specify the alternative function to be configured for the specified
67 pins. 82 pins.
68 83
69 enum: [ atest_char, atest_char0, atest 84 enum: [ atest_char, atest_char0, atest_char1, atest_char2,
70 atest_char3, atest_usb0, atest 85 atest_char3, atest_usb0, atest_usb00, atest_usb01,
71 atest_usb02, atest_usb03, ates 86 atest_usb02, atest_usb03, atest_usb1, atest_usb10,
72 atest_usb11, atest_usb12, ates 87 atest_usb11, atest_usb12, atest_usb13, audio_ref,
73 cam_mclk, cci_async, cci_i2c, 88 cam_mclk, cci_async, cci_i2c, cci_timer0, cci_timer1,
74 cci_timer2, cci_timer3, cci_ti 89 cci_timer2, cci_timer3, cci_timer4, cmu_rng0, cmu_rng1,
75 cmu_rng2, cmu_rng3, coex_uart1 90 cmu_rng2, cmu_rng3, coex_uart1, cri_trng, cri_trng0,
76 cri_trng1, dbg_out, ddr_bist, 91 cri_trng1, dbg_out, ddr_bist, ddr_pxi0, ddr_pxi1, dp_hot,
77 dp_lcd, edp_hot, edp_lcd, gcc_ 92 dp_lcd, edp_hot, edp_lcd, gcc_gp1, gcc_gp2, gcc_gp3,
78 gpio, host2wlan_sol, ibi_i3c, 93 gpio, host2wlan_sol, ibi_i3c, jitter_bist, lpass_slimbus,
79 mdp_vsync, mdp_vsync0, mdp_vsy 94 mdp_vsync, mdp_vsync0, mdp_vsync1, mdp_vsync2, mdp_vsync3,
80 mdp_vsync4, mdp_vsync5, mi2s0_ 95 mdp_vsync4, mdp_vsync5, mi2s0_data0, mi2s0_data1, mi2s0_sck,
81 mi2s0_ws, mi2s1_data0, mi2s1_d 96 mi2s0_ws, mi2s1_data0, mi2s1_data1, mi2s1_sck, mi2s1_ws,
82 mi2s2_data0, mi2s2_data1, mi2s 97 mi2s2_data0, mi2s2_data1, mi2s2_sck, mi2s2_ws, mss_grfc0,
83 mss_grfc1, mss_grfc10, mss_grf 98 mss_grfc1, mss_grfc10, mss_grfc11, mss_grfc12, mss_grfc2,
84 mss_grfc3, mss_grfc4, mss_grfc 99 mss_grfc3, mss_grfc4, mss_grfc5, mss_grfc6, mss_grfc7,
85 mss_grfc8, mss_grfc9, nav_gpio 100 mss_grfc8, mss_grfc9, nav_gpio0, nav_gpio1, nav_gpio2,
86 pa_indicator, pcie0_clkreqn, p 101 pa_indicator, pcie0_clkreqn, pcie1_clkreqn, phase_flag,
87 pll_bist, pll_bypassnl, pll_cl 102 pll_bist, pll_bypassnl, pll_clk, pll_reset, pri_mi2s, prng_rosc,
88 qdss, qdss_cti, qlink0_enable, 103 qdss, qdss_cti, qlink0_enable, qlink0_request, qlink0_wmss,
89 qlink1_enable, qlink1_request, 104 qlink1_enable, qlink1_request, qlink1_wmss, qspi_clk, qspi_cs,
90 qspi_data, qup00, qup01, qup02 105 qspi_data, qup00, qup01, qup02, qup03, qup04, qup05, qup06, qup07,
91 qup10, qup11, qup12, qup13, qu 106 qup10, qup11, qup12, qup13, qup14, qup15, qup16, qup17,
92 sdc40, sdc41, sdc42, sdc43, sd 107 sdc40, sdc41, sdc42, sdc43, sdc4_clk, sdc4_cmd, sd_write,
93 sec_mi2s, tb_trig, tgu_ch0, tg 108 sec_mi2s, tb_trig, tgu_ch0, tgu_ch1, tsense_pwm1,
94 tsense_pwm2, uim0_clk, uim0_da 109 tsense_pwm2, uim0_clk, uim0_data, uim0_present, uim0_reset,
95 uim1_clk, uim1_data, uim1_pres 110 uim1_clk, uim1_data, uim1_present, uim1_reset, usb2phy_ac,
96 usb_phy, vfr_0, vfr_1, vsense_ 111 usb_phy, vfr_0, vfr_1, vsense_trigger ]
97 112
>> 113 bias-pull-down: true
>> 114 bias-pull-up: true
>> 115 bias-bus-hold: true
>> 116 bias-disable: true
>> 117 drive-strength: true
>> 118 input-enable: true
>> 119 output-high: true
>> 120 output-low: true
>> 121
98 required: 122 required:
99 - pins 123 - pins
100 124
>> 125 additionalProperties: false
>> 126
101 allOf: 127 allOf:
102 - $ref: /schemas/pinctrl/qcom,tlmm-common.ya 128 - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
103 129
104 required: 130 required:
105 - compatible 131 - compatible
106 - reg 132 - reg
>> 133 - interrupts
>> 134 - interrupt-controller
>> 135 - '#interrupt-cells'
>> 136 - gpio-controller
>> 137 - '#gpio-cells'
>> 138 - gpio-ranges
107 139
108 unevaluatedProperties: false !! 140 additionalProperties: false
109 141
110 examples: 142 examples:
111 - | 143 - |
112 #include <dt-bindings/interrupt-controller 144 #include <dt-bindings/interrupt-controller/arm-gic.h>
113 tlmm: pinctrl@f000000 { 145 tlmm: pinctrl@f000000 {
114 compatible = "qcom,sc7280-pinctrl"; 146 compatible = "qcom,sc7280-pinctrl";
115 reg = <0xf000000 0x1000000>; 147 reg = <0xf000000 0x1000000>;
116 interrupts = <GIC_SPI 208 IRQ_TYPE_LEV 148 interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
117 gpio-controller; 149 gpio-controller;
118 #gpio-cells = <2>; 150 #gpio-cells = <2>;
119 interrupt-controller; 151 interrupt-controller;
120 #interrupt-cells = <2>; 152 #interrupt-cells = <2>;
121 gpio-ranges = <&tlmm 0 0 175>; 153 gpio-ranges = <&tlmm 0 0 175>;
122 wakeup-parent = <&pdc>; 154 wakeup-parent = <&pdc>;
123 155
124 qup_uart5_default: qup-uart5-state { 156 qup_uart5_default: qup-uart5-state {
125 pins = "gpio46", "gpio47"; 157 pins = "gpio46", "gpio47";
126 function = "qup13"; 158 function = "qup13";
127 drive-strength = <2>; 159 drive-strength = <2>;
128 bias-disable; 160 bias-disable;
129 }; 161 };
130 }; 162 };
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