1 # SPDX-License-Identifier: (GPL-2.0-only OR BS
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qco
5 $schema: http://devicetree.org/meta-schemas/co
6
7 title: Qualcomm Technologies, Inc. SDX65 TLMM
8
9 maintainers:
10 - Vamsi krishna Lanka <quic_vamslank@quicinc.
11
12 description:
13 Top Level Mode Multiplexer pin controller in
14
15 properties:
16 compatible:
17 const: qcom,sdx65-tlmm
18
19 reg:
20 maxItems: 1
21
22 interrupts:
23 maxItems: 1
24
25 gpio-reserved-ranges:
26 maxItems: 1
27
28 patternProperties:
29 "-state$":
30 oneOf:
31 - $ref: "#/$defs/qcom-sdx65-tlmm-state"
32 - patternProperties:
33 "-pins$":
34 $ref: "#/$defs/qcom-sdx65-tlmm-sta
35 additionalProperties: false
36
37 $defs:
38 qcom-sdx65-tlmm-state:
39 type: object
40 description:
41 Pinctrl node's client devices use subnod
42 Client device subnodes use below standar
43 $ref: qcom,tlmm-common.yaml#/$defs/qcom-tl
44 unevaluatedProperties: false
45
46 properties:
47 pins:
48 description:
49 List of gpio pins affected by the pr
50 items:
51 oneOf:
52 - pattern: "^gpio([0-9]|[1-9][0-9]
53 - enum: [ ufs_reset, sdc1_clk, sdc
54 minItems: 1
55 maxItems: 150
56
57 function:
58 description:
59 Specify the alternative function to
60 pins. Functions are only valid for g
61 enum: [ blsp_uart1, blsp_spi1, blsp_i2
62 bimc_dte1, dac_calib0, blsp_sp
63 qdss_cti_trig_out_b, bimc_dte0
64 dac_calib2, atest_tsens2, ates
65 blsp_uim10, atest_bbrx1, atest
66 mdp_vsync, edp_lcd, blsp_i2c10
67 atest_gpsadc0, edp_hot, atest_
68 cam_mclk, pll_bypassnl, qdss_s
69 pll_reset, qdss_stm6, qdss_stm
70 qdss_stm3, dac_calib3, atest_u
71 qdss_stm2, atest_usb22, atest_
72 atest_usb21, atest_char1, dbg_
73 atest_usb20, atest_char0, dac_
74 qdss_cti_trig_in_a, cci_timer4
75 blsp2_spi, qdss_stm9, qdss_cti
76 qdss_stm8, cci_timer0, qdss_st
77 qdss_stm12, dac_calib8, cci_ti
78 dac_calib9, cci_timer3, cci_as
79 qdss_tracectl_a, dac_calib13,
80 dac_calib15, hdmi_rcv, dac_cal
81 dac_calib17, hdmi_ddc, pwr_nav
82 dac_calib19, hdmi_hot, dac_cal
83 dac_calib22, dac_calib23, dac_
84 sd_write, tsif1_error, blsp_sp
85 qdss_cti, blsp_i2c2, blsp_spi3
86 uim3, blsp_spi9, blsp_uart9, b
87 blsp_spi7, blsp_uart7, blsp_ui
88 qua_mi2s, gcc_gp1_clk_a, ssc_i
89 blsp_uim11, gcc_gp2_clk_a, gcc
90 cri_trng1, cri_trng, qdss_stm1
91 blsp_uart4, blsp_uim4, qdss_st
92 qdss_stm14, dac_calib26, spkr_
93 isense_dbg, tsense_pwm1, tsens
94 qdss_stm22, qdss_stm21, qdss_s
95 sec_mi2s, blsp_spi5, blsp_uart
96 gcc_gp3_clk_b, blsp_i2c5, blsp
97 qdss_stm25, qdss_stm31, blsp_i
98 tsif1_clk, qdss_stm28, tsif1_e
99 qdss_traceclk_b, tsif2_error,
100 sdc4_clk, qdss_stm24, tsif2_en
101 sd_card, tsif2_data, sdc41, ts
102 ldo_en, mdp_vsync_s_b, ldo_upd
103 blsp11_i2c_sda_b, prng_rosc, b
104 pci_e2, pa_indicator, adsp_ext
105 qdss_tracedata_12, modem_tsync
106 qspi_cs, ssbi2, ssbi1, mss_lte
107 gpio ]
108
109 required:
110 - pins
111
112 allOf:
113 - $ref: /schemas/pinctrl/qcom,tlmm-common.ya
114
115 required:
116 - compatible
117 - reg
118
119 unevaluatedProperties: false
120
121 examples:
122 - |
123 #include <dt-bindings/interrupt-controller
124 tlmm: pinctrl@f100000 {
125 compatible = "qcom,sdx65-tlmm";
126 reg = <0x03000000 0xdc2000>;
127 gpio-controller;
128 #gpio-cells = <2>;
129 gpio-ranges = <&tlmm 0 0 109>;
130 interrupt-controller;
131 #interrupt-cells = <2>;
132 interrupts = <GIC_SPI 212 IRQ_TYPE_LEV
133
134 gpio-wo-subnode-state {
135 pins = "gpio1";
136 function = "gpio";
137 };
138
139 uart-w-subnodes-state {
140 rx-pins {
141 pins = "gpio4";
142 function = "blsp_uart1";
143 bias-pull-up;
144 };
145
146 tx-pins {
147 pins = "gpio5";
148 function = "blsp_uart1";
149 bias-disable;
150 };
151 };
152 };
153 ...
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