1 # SPDX-License-Identifier: (GPL-2.0-only OR BS 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qco 4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm6375-tlmm.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: Qualcomm Technologies, Inc. SM6375 TLMM 7 title: Qualcomm Technologies, Inc. SM6375 TLMM block
8 8
9 maintainers: 9 maintainers:
10 - Konrad Dybcio <konradybcio@kernel.org> !! 10 - Konrad Dybcio <konrad.dybcio@somainline.org>
11 11
12 description: !! 12 description: |
13 Top Level Mode Multiplexer pin controller in !! 13 This binding describes the Top Level Mode Multiplexer (TLMM) block found
>> 14 in the SM6375 platform.
14 15
15 allOf: 16 allOf:
>> 17 - $ref: "pinctrl.yaml#"
16 - $ref: /schemas/pinctrl/qcom,tlmm-common.ya 18 - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
17 19
18 properties: 20 properties:
19 compatible: 21 compatible:
20 const: qcom,sm6375-tlmm 22 const: qcom,sm6375-tlmm
21 23
22 reg: 24 reg:
23 maxItems: 1 25 maxItems: 1
24 26
25 interrupts: !! 27 interrupts: true
26 maxItems: 1 !! 28 interrupt-controller: true
27 !! 29 '#interrupt-cells': true
>> 30 gpio-controller: true
28 gpio-reserved-ranges: true 31 gpio-reserved-ranges: true
>> 32 '#gpio-cells': true
>> 33 gpio-ranges: true
>> 34 wakeup-parent: true
>> 35
>> 36 required:
>> 37 - compatible
>> 38 - reg
>> 39
>> 40 additionalProperties: false
29 41
30 patternProperties: 42 patternProperties:
31 "-state$": !! 43 '-state$':
32 oneOf: 44 oneOf:
33 - $ref: "#/$defs/qcom-sm6375-tlmm-state" 45 - $ref: "#/$defs/qcom-sm6375-tlmm-state"
34 - patternProperties: 46 - patternProperties:
35 "-pins$": !! 47 ".*":
36 $ref: "#/$defs/qcom-sm6375-tlmm-st 48 $ref: "#/$defs/qcom-sm6375-tlmm-state"
37 additionalProperties: false <<
38 49
39 $defs: 50 $defs:
40 qcom-sm6375-tlmm-state: 51 qcom-sm6375-tlmm-state:
41 type: object 52 type: object
42 description: 53 description:
43 Pinctrl node's client devices use subnod 54 Pinctrl node's client devices use subnodes for desired pin configuration.
44 Client device subnodes use below standar 55 Client device subnodes use below standard properties.
45 $ref: qcom,tlmm-common.yaml#/$defs/qcom-tl !! 56 $ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state"
46 unevaluatedProperties: false <<
47 57
48 properties: 58 properties:
49 pins: 59 pins:
50 description: 60 description:
51 List of gpio pins affected by the pr 61 List of gpio pins affected by the properties specified in this
52 subnode. 62 subnode.
53 items: 63 items:
54 oneOf: 64 oneOf:
55 - pattern: "^gpio([0-9]|[1-9][0-9] !! 65 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-4][0-9]|15[0-6])$"
56 - enum: [ ufs_reset, sdc1_clk, sdc 66 - enum: [ ufs_reset, sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk,
57 sdc2_cmd, sdc2_data ] 67 sdc2_cmd, sdc2_data ]
58 minItems: 1 68 minItems: 1
59 maxItems: 36 69 maxItems: 36
60 70
61 function: 71 function:
62 description: 72 description:
63 Specify the alternative function to 73 Specify the alternative function to be configured for the specified
64 pins. 74 pins.
65 75
66 enum: [ adsp_ext, agera_pll, atest_cha 76 enum: [ adsp_ext, agera_pll, atest_char, atest_char0, atest_char1,
67 atest_char2, atest_char3, ates 77 atest_char2, atest_char3, atest_tsens, atest_tsens2,
68 atest_usb1, atest_usb10, atest 78 atest_usb1, atest_usb10, atest_usb11, atest_usb12,
69 atest_usb13, atest_usb2, atest 79 atest_usb13, atest_usb2, atest_usb20, atest_usb21,
70 atest_usb22, atest_usb23, audi 80 atest_usb22, atest_usb23, audio_ref, btfm_slimbus, cam_mclk,
71 cci_async, cci_i2c, cci_timer0 81 cci_async, cci_i2c, cci_timer0, cci_timer1, cci_timer2,
72 cci_timer3, cci_timer4, cri_tr 82 cci_timer3, cci_timer4, cri_trng, dbg_out, ddr_bist,
73 ddr_pxi0, ddr_pxi1, ddr_pxi2, 83 ddr_pxi0, ddr_pxi1, ddr_pxi2, ddr_pxi3, dp_hot, edp_lcd,
74 gcc_gp1, gcc_gp2, gcc_gp3, gp_ 84 gcc_gp1, gcc_gp2, gcc_gp3, gp_pdm0, gp_pdm1, gp_pdm2, gpio,
75 gps_tx, ibi_i3c, jitter_bist, 85 gps_tx, ibi_i3c, jitter_bist, ldo_en, ldo_update, lpass_ext,
76 m_voc, mclk, mdp_vsync, mdp_vs 86 m_voc, mclk, mdp_vsync, mdp_vsync0, mdp_vsync1, mdp_vsync2,
77 mdp_vsync3, mi2s_0, mi2s_1, mi 87 mdp_vsync3, mi2s_0, mi2s_1, mi2s_2, mss_lte, nav_gpio,
78 nav_pps, pa_indicator, phase_f 88 nav_pps, pa_indicator, phase_flag0, phase_flag1, phase_flag10,
79 phase_flag11, phase_flag12, ph 89 phase_flag11, phase_flag12, phase_flag13, phase_flag14,
80 phase_flag15, phase_flag16, ph 90 phase_flag15, phase_flag16, phase_flag17, phase_flag18,
81 phase_flag19, phase_flag2, pha 91 phase_flag19, phase_flag2, phase_flag20, phase_flag21,
82 phase_flag22, phase_flag23, ph 92 phase_flag22, phase_flag23, phase_flag24, phase_flag25,
83 phase_flag26, phase_flag27, ph 93 phase_flag26, phase_flag27, phase_flag28, phase_flag29,
84 phase_flag3, phase_flag30, pha 94 phase_flag3, phase_flag30, phase_flag31, phase_flag4,
85 phase_flag5, phase_flag6, phas 95 phase_flag5, phase_flag6, phase_flag7, phase_flag8,
86 phase_flag9, pll_bist, pll_byp 96 phase_flag9, pll_bist, pll_bypassnl, pll_clk, pll_reset,
87 prng_rosc0, prng_rosc1, prng_r 97 prng_rosc0, prng_rosc1, prng_rosc2, prng_rosc3, qdss_cti,
88 qdss_gpio, qdss_gpio0, qdss_gp 98 qdss_gpio, qdss_gpio0, qdss_gpio1, qdss_gpio10, qdss_gpio11,
89 qdss_gpio12, qdss_gpio13, qdss 99 qdss_gpio12, qdss_gpio13, qdss_gpio14, qdss_gpio15,
90 qdss_gpio2, qdss_gpio3, qdss_g 100 qdss_gpio2, qdss_gpio3, qdss_gpio4, qdss_gpio5, qdss_gpio6,
91 qdss_gpio7, qdss_gpio8, qdss_g 101 qdss_gpio7, qdss_gpio8, qdss_gpio9, qlink0_enable,
92 qlink0_request, qlink0_wmss, q 102 qlink0_request, qlink0_wmss, qlink1_enable, qlink1_request,
93 qlink1_wmss, qup00, qup01, qup 103 qlink1_wmss, qup00, qup01, qup02, qup10, qup11_f1, qup11_f2,
94 qup12, qup13_f1, qup13_f2, qup 104 qup12, qup13_f1, qup13_f2, qup14, sd_write, sdc1_tb, sdc2_tb,
95 sp_cmu, tgu_ch0, tgu_ch1, tgu_ 105 sp_cmu, tgu_ch0, tgu_ch1, tgu_ch2, tgu_ch3, tsense_pwm1,
96 tsense_pwm2, uim1_clk, uim1_da 106 tsense_pwm2, uim1_clk, uim1_data, uim1_present, uim1_reset,
97 uim2_clk, uim2_data, uim2_pres 107 uim2_clk, uim2_data, uim2_present, uim2_reset, usb2phy_ac,
98 usb_phy, vfr_1, vsense_trigger 108 usb_phy, vfr_1, vsense_trigger, wlan1_adc0, wlan1_adc1,
99 wlan2_adc0, wlan2_adc1 ] 109 wlan2_adc0, wlan2_adc1 ]
100 110
>> 111
>> 112 bias-disable: true
>> 113 bias-pull-down: true
>> 114 bias-pull-up: true
>> 115 drive-strength: true
>> 116 input-enable: true
>> 117 output-high: true
>> 118 output-low: true
>> 119
101 required: 120 required:
102 - pins 121 - pins
>> 122 - function
103 123
104 required: !! 124 additionalProperties: false
105 - compatible <<
106 - reg <<
107 <<
108 unevaluatedProperties: false <<
109 125
110 examples: 126 examples:
111 - | 127 - |
112 #include <dt-bindings/interrupt-controller !! 128 #include <dt-bindings/interrupt-controller/arm-gic.h>
113 pinctrl@500000 { !! 129 pinctrl@500000 {
114 compatible = "qcom,sm6375-tlmm"; !! 130 compatible = "qcom,sm6375-tlmm";
115 reg = <0x00500000 0x800000>; !! 131 reg = <0x00500000 0x800000>;
116 interrupts = <GIC_SPI 227 IRQ_TYPE_LEV !! 132 interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
117 gpio-controller; !! 133 gpio-controller;
118 #gpio-cells = <2>; !! 134 #gpio-cells = <2>;
119 interrupt-controller; !! 135 interrupt-controller;
120 #interrupt-cells = <2>; !! 136 #interrupt-cells = <2>;
121 gpio-ranges = <&tlmm 0 0 157>; /* GPIO !! 137 gpio-ranges = <&tlmm 0 0 157>;
122 !! 138
123 gpio-wo-subnode-state { !! 139 gpio-wo-subnode-state {
124 pins = "gpio1"; !! 140 pins = "gpio1";
125 function = "gpio"; !! 141 function = "gpio";
126 }; !! 142 };
127 !! 143
128 uart-w-subnodes-state { !! 144 uart-w-subnodes-state {
129 rx-pins { !! 145 rx {
130 pins = "gpio18"; !! 146 pins = "gpio18";
131 function = "qup13_f2"; !! 147 function = "qup13_f2";
132 bias-pull-up; !! 148 bias-pull-up;
133 }; !! 149 };
134 !! 150
135 tx-pins { !! 151 tx {
136 pins = "gpio19"; !! 152 pins = "gpio19";
137 function = "qup13_f2"; !! 153 function = "qup13_f2";
138 bias-disable; !! 154 bias-disable;
139 }; !! 155 };
>> 156 };
140 }; 157 };
141 }; <<
142 ... 158 ...
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