1 # SPDX-License-Identifier: GPL-2.0-only OR BSD
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/tos
5 $schema: http://devicetree.org/meta-schemas/co
6
7 title: Toshiba Visconti TMPV770x pin mux/confi
8
9 maintainers:
10 - Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshi
11
12 description:
13 Toshiba's Visconti ARM SoC a pin mux/config
14
15 properties:
16 compatible:
17 enum:
18 - toshiba,tmpv7708-pinctrl
19
20 reg:
21 maxItems: 1
22
23 allOf:
24 - $ref: pinctrl.yaml#
25
26 required:
27 - compatible
28 - reg
29
30 patternProperties:
31 '-pins$':
32 type: object
33 description: |
34 A pinctrl node should contain at least o
35 pinctrl groups available on the machine.
36 pins it needs, and how they should be co
37 configuration, pullups, drive strength.
38 $ref: pinmux-node.yaml
39 additionalProperties: false
40
41 properties:
42 function:
43 description:
44 Function to mux.
45 $ref: /schemas/types.yaml#/definitions
46 enum: [i2c0, i2c1, i2c2, i2c3, i2c4, i
47 spi0, spi1, spi2, spi3, spi4, s
48 uart0, uart1, uart2, uart3, pwm
49
50 groups:
51 description:
52 Name of the pin group to use for the
53 $ref: /schemas/types.yaml#/definitions
54 enum: [i2c0_grp, i2c1_grp, i2c2_grp, i
55 i2c5_grp, i2c6_grp, i2c7_grp, i
56 spi0_grp, spi0_cs0_grp, spi0_cs
57 spi1_grp, spi2_grp, spi3_grp, s
58 uart0_grp, uart1_grp, uart2_grp
59 pwm0_gpio4_grp, pwm0_gpio8_grp,
60 pwm0_gpio16_grp, pwm1_gpio5_grp
61 pwm1_gpio13_grp, pwm1_gpio17_gr
62 pwm2_gpio10_grp, pwm2_gpio14_gr
63 pwm3_gpio7_grp, pwm3_gpio11_grp
64 pwm3_gpio19_grp, pcmif_out_grp,
65
66 drive-strength:
67 enum: [2, 4, 6, 8, 16, 24, 32]
68 default: 2
69 description:
70 Selects the drive strength for the s
71
72 bias-pull-up: true
73
74 bias-pull-down: true
75
76 bias-disable: true
77
78 additionalProperties: false
79
80 examples:
81 # Pinmux controller node
82 - |
83 soc {
84 #address-cells = <2>;
85 #size-cells = <2>;
86
87 pmux: pinmux@24190000 {
88 compatible = "toshiba,tmpv7708-pin
89 reg = <0 0x24190000 0 0x10000>;
90
91 spi0_pins: spi0-pins {
92 function = "spi0";
93 groups = "spi0_grp";
94 };
95 };
96 };
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