1 # SPDX-License-Identifier: GPL-2.0 1 # SPDX-License-Identifier: GPL-2.0
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/power/rockc 4 $id: http://devicetree.org/schemas/power/rockchip,power-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: Rockchip Power Domains 7 title: Rockchip Power Domains
8 8
9 maintainers: 9 maintainers:
10 - Elaine Zhang <zhangqing@rock-chips.com> 10 - Elaine Zhang <zhangqing@rock-chips.com>
11 - Heiko Stuebner <heiko@sntech.de> 11 - Heiko Stuebner <heiko@sntech.de>
12 12
13 description: | 13 description: |
14 Rockchip processors include support for mult 14 Rockchip processors include support for multiple power domains
15 which can be powered up/down by software bas 15 which can be powered up/down by software based on different
16 application scenarios to save power. 16 application scenarios to save power.
17 17
18 Power domains contained within power-control 18 Power domains contained within power-controller node are
19 generic power domain providers documented in 19 generic power domain providers documented in
20 Documentation/devicetree/bindings/power/powe 20 Documentation/devicetree/bindings/power/power-domain.yaml.
21 21
22 IP cores belonging to a power domain should 22 IP cores belonging to a power domain should contain a
23 "power-domains" property that is a phandle f 23 "power-domains" property that is a phandle for the
24 power domain node representing the domain. 24 power domain node representing the domain.
25 25
26 properties: 26 properties:
27 $nodename: 27 $nodename:
28 const: power-controller 28 const: power-controller
29 29
30 compatible: 30 compatible:
31 enum: 31 enum:
32 - rockchip,px30-power-controller 32 - rockchip,px30-power-controller
33 - rockchip,rk3036-power-controller 33 - rockchip,rk3036-power-controller
34 - rockchip,rk3066-power-controller 34 - rockchip,rk3066-power-controller
35 - rockchip,rk3128-power-controller 35 - rockchip,rk3128-power-controller
36 - rockchip,rk3188-power-controller 36 - rockchip,rk3188-power-controller
37 - rockchip,rk3228-power-controller 37 - rockchip,rk3228-power-controller
38 - rockchip,rk3288-power-controller 38 - rockchip,rk3288-power-controller
39 - rockchip,rk3328-power-controller 39 - rockchip,rk3328-power-controller
40 - rockchip,rk3366-power-controller 40 - rockchip,rk3366-power-controller
41 - rockchip,rk3368-power-controller 41 - rockchip,rk3368-power-controller
42 - rockchip,rk3399-power-controller 42 - rockchip,rk3399-power-controller
43 - rockchip,rk3568-power-controller 43 - rockchip,rk3568-power-controller
44 - rockchip,rk3576-power-controller <<
45 - rockchip,rk3588-power-controller <<
46 - rockchip,rv1126-power-controller <<
47 44
48 "#power-domain-cells": 45 "#power-domain-cells":
49 const: 1 46 const: 1
50 47
51 "#address-cells": 48 "#address-cells":
52 const: 1 49 const: 1
53 50
54 "#size-cells": 51 "#size-cells":
55 const: 0 52 const: 0
56 53
57 required: 54 required:
58 - compatible 55 - compatible
59 - "#power-domain-cells" 56 - "#power-domain-cells"
60 57
61 additionalProperties: false 58 additionalProperties: false
62 59
63 patternProperties: 60 patternProperties:
64 "^power-domain@[0-9a-f]+$": 61 "^power-domain@[0-9a-f]+$":
65 62
66 $ref: "#/$defs/pd-node" 63 $ref: "#/$defs/pd-node"
67 64
68 unevaluatedProperties: false 65 unevaluatedProperties: false
69 66
70 properties: 67 properties:
71 "#address-cells": 68 "#address-cells":
72 const: 1 69 const: 1
73 70
74 "#size-cells": 71 "#size-cells":
75 const: 0 72 const: 0
76 73
77 patternProperties: 74 patternProperties:
78 "^power-domain@[0-9a-f]+$": 75 "^power-domain@[0-9a-f]+$":
79 76
80 $ref: "#/$defs/pd-node" 77 $ref: "#/$defs/pd-node"
81 78
82 unevaluatedProperties: false 79 unevaluatedProperties: false
83 80
84 properties: 81 properties:
85 "#address-cells": 82 "#address-cells":
86 const: 1 83 const: 1
87 84
88 "#size-cells": 85 "#size-cells":
89 const: 0 86 const: 0
90 87
91 patternProperties: 88 patternProperties:
92 "^power-domain@[0-9a-f]+$": 89 "^power-domain@[0-9a-f]+$":
93 90
94 $ref: "#/$defs/pd-node" 91 $ref: "#/$defs/pd-node"
95 92
96 unevaluatedProperties: false 93 unevaluatedProperties: false
97 94
98 properties: 95 properties:
99 "#power-domain-cells": 96 "#power-domain-cells":
100 const: 0 97 const: 0
101 98
102 $defs: 99 $defs:
103 pd-node: 100 pd-node:
104 type: object 101 type: object
105 description: | 102 description: |
106 Represents the power domains within the 103 Represents the power domains within the power controller node.
107 104
108 properties: 105 properties:
109 reg: 106 reg:
110 maxItems: 1 107 maxItems: 1
111 description: | 108 description: |
112 Power domain index. Valid values are 109 Power domain index. Valid values are defined in
113 "include/dt-bindings/power/px30-powe 110 "include/dt-bindings/power/px30-power.h"
114 "include/dt-bindings/power/rk3036-po 111 "include/dt-bindings/power/rk3036-power.h"
115 "include/dt-bindings/power/rk3066-po 112 "include/dt-bindings/power/rk3066-power.h"
116 "include/dt-bindings/power/rk3128-po 113 "include/dt-bindings/power/rk3128-power.h"
117 "include/dt-bindings/power/rk3188-po 114 "include/dt-bindings/power/rk3188-power.h"
118 "include/dt-bindings/power/rk3228-po 115 "include/dt-bindings/power/rk3228-power.h"
119 "include/dt-bindings/power/rk3288-po 116 "include/dt-bindings/power/rk3288-power.h"
120 "include/dt-bindings/power/rk3328-po 117 "include/dt-bindings/power/rk3328-power.h"
121 "include/dt-bindings/power/rk3366-po 118 "include/dt-bindings/power/rk3366-power.h"
122 "include/dt-bindings/power/rk3368-po 119 "include/dt-bindings/power/rk3368-power.h"
123 "include/dt-bindings/power/rk3399-po 120 "include/dt-bindings/power/rk3399-power.h"
124 "include/dt-bindings/power/rk3568-po 121 "include/dt-bindings/power/rk3568-power.h"
125 "include/dt-bindings/power/rk3588-po <<
126 "include/dt-bindings/power/rockchip, <<
127 122
128 clocks: 123 clocks:
129 minItems: 1 124 minItems: 1
130 maxItems: 30 125 maxItems: 30
131 description: | 126 description: |
132 A number of phandles to clocks that 127 A number of phandles to clocks that need to be enabled
133 while power domain switches state. 128 while power domain switches state.
134 129
135 pm_qos: 130 pm_qos:
136 $ref: /schemas/types.yaml#/definitions 131 $ref: /schemas/types.yaml#/definitions/phandle-array
137 items: <<
138 maxItems: 1 <<
139 description: | 132 description: |
140 A number of phandles to qos blocks w 133 A number of phandles to qos blocks which need to be saved and restored
141 while power domain switches state. 134 while power domain switches state.
142 135
143 "#power-domain-cells": 136 "#power-domain-cells":
144 enum: [0, 1] 137 enum: [0, 1]
145 description: 138 description:
146 Must be 0 for nodes representing a s 139 Must be 0 for nodes representing a single PM domain and 1 for nodes
147 providing multiple PM domains. 140 providing multiple PM domains.
148 141
149 required: 142 required:
150 - reg 143 - reg
151 - "#power-domain-cells" 144 - "#power-domain-cells"
152 145
153 examples: 146 examples:
154 - | 147 - |
155 #include <dt-bindings/clock/rk3399-cru.h> 148 #include <dt-bindings/clock/rk3399-cru.h>
156 #include <dt-bindings/power/rk3399-power.h 149 #include <dt-bindings/power/rk3399-power.h>
157 150
158 soc { 151 soc {
159 #address-cells = <2>; 152 #address-cells = <2>;
160 #size-cells = <2>; 153 #size-cells = <2>;
161 154
162 qos_hdcp: qos@ffa90000 { 155 qos_hdcp: qos@ffa90000 {
163 compatible = "rockchip,rk3399-qos" 156 compatible = "rockchip,rk3399-qos", "syscon";
164 reg = <0x0 0xffa90000 0x0 0x20>; 157 reg = <0x0 0xffa90000 0x0 0x20>;
165 }; 158 };
166 159
167 qos_iep: qos@ffa98000 { 160 qos_iep: qos@ffa98000 {
168 compatible = "rockchip,rk3399-qos" 161 compatible = "rockchip,rk3399-qos", "syscon";
169 reg = <0x0 0xffa98000 0x0 0x20>; 162 reg = <0x0 0xffa98000 0x0 0x20>;
170 }; 163 };
171 164
172 qos_rga_r: qos@ffab0000 { 165 qos_rga_r: qos@ffab0000 {
173 compatible = "rockchip,rk3399-qos" 166 compatible = "rockchip,rk3399-qos", "syscon";
174 reg = <0x0 0xffab0000 0x0 0x20>; 167 reg = <0x0 0xffab0000 0x0 0x20>;
175 }; 168 };
176 169
177 qos_rga_w: qos@ffab0080 { 170 qos_rga_w: qos@ffab0080 {
178 compatible = "rockchip,rk3399-qos" 171 compatible = "rockchip,rk3399-qos", "syscon";
179 reg = <0x0 0xffab0080 0x0 0x20>; 172 reg = <0x0 0xffab0080 0x0 0x20>;
180 }; 173 };
181 174
182 qos_video_m0: qos@ffab8000 { 175 qos_video_m0: qos@ffab8000 {
183 compatible = "rockchip,rk3399-qos" 176 compatible = "rockchip,rk3399-qos", "syscon";
184 reg = <0x0 0xffab8000 0x0 0x20>; 177 reg = <0x0 0xffab8000 0x0 0x20>;
185 }; 178 };
186 179
187 qos_video_m1_r: qos@ffac0000 { 180 qos_video_m1_r: qos@ffac0000 {
188 compatible = "rockchip,rk3399-qos" 181 compatible = "rockchip,rk3399-qos", "syscon";
189 reg = <0x0 0xffac0000 0x0 0x20>; 182 reg = <0x0 0xffac0000 0x0 0x20>;
190 }; 183 };
191 184
192 qos_video_m1_w: qos@ffac0080 { 185 qos_video_m1_w: qos@ffac0080 {
193 compatible = "rockchip,rk3399-qos" 186 compatible = "rockchip,rk3399-qos", "syscon";
194 reg = <0x0 0xffac0080 0x0 0x20>; 187 reg = <0x0 0xffac0080 0x0 0x20>;
195 }; 188 };
196 189
197 power-management@ff310000 { 190 power-management@ff310000 {
198 compatible = "rockchip,rk3399-pmu" 191 compatible = "rockchip,rk3399-pmu", "syscon", "simple-mfd";
199 reg = <0x0 0xff310000 0x0 0x1000>; 192 reg = <0x0 0xff310000 0x0 0x1000>;
200 193
201 power-controller { 194 power-controller {
202 compatible = "rockchip,rk3399- 195 compatible = "rockchip,rk3399-power-controller";
203 #power-domain-cells = <1>; 196 #power-domain-cells = <1>;
204 #address-cells = <1>; 197 #address-cells = <1>;
205 #size-cells = <0>; 198 #size-cells = <0>;
206 199
207 /* These power domains are gro 200 /* These power domains are grouped by VD_CENTER */
208 power-domain@RK3399_PD_IEP { 201 power-domain@RK3399_PD_IEP {
209 reg = <RK3399_PD_IEP>; 202 reg = <RK3399_PD_IEP>;
210 clocks = <&cru ACLK_IEP>, 203 clocks = <&cru ACLK_IEP>,
211 <&cru HCLK_IEP>; 204 <&cru HCLK_IEP>;
212 pm_qos = <&qos_iep>; 205 pm_qos = <&qos_iep>;
213 #power-domain-cells = <0>; 206 #power-domain-cells = <0>;
214 }; 207 };
215 power-domain@RK3399_PD_RGA { 208 power-domain@RK3399_PD_RGA {
216 reg = <RK3399_PD_RGA>; 209 reg = <RK3399_PD_RGA>;
217 clocks = <&cru ACLK_RGA>, 210 clocks = <&cru ACLK_RGA>,
218 <&cru HCLK_RGA>; 211 <&cru HCLK_RGA>;
219 pm_qos = <&qos_rga_r>, 212 pm_qos = <&qos_rga_r>,
220 <&qos_rga_w>; 213 <&qos_rga_w>;
221 #power-domain-cells = <0>; 214 #power-domain-cells = <0>;
222 }; 215 };
223 power-domain@RK3399_PD_VCODEC 216 power-domain@RK3399_PD_VCODEC {
224 reg = <RK3399_PD_VCODEC>; 217 reg = <RK3399_PD_VCODEC>;
225 clocks = <&cru ACLK_VCODEC 218 clocks = <&cru ACLK_VCODEC>,
226 <&cru HCLK_VCODEC 219 <&cru HCLK_VCODEC>;
227 pm_qos = <&qos_video_m0>; 220 pm_qos = <&qos_video_m0>;
228 #power-domain-cells = <0>; 221 #power-domain-cells = <0>;
229 }; 222 };
230 power-domain@RK3399_PD_VDU { 223 power-domain@RK3399_PD_VDU {
231 reg = <RK3399_PD_VDU>; 224 reg = <RK3399_PD_VDU>;
232 clocks = <&cru ACLK_VDU>, 225 clocks = <&cru ACLK_VDU>,
233 <&cru HCLK_VDU>; 226 <&cru HCLK_VDU>;
234 pm_qos = <&qos_video_m1_r> 227 pm_qos = <&qos_video_m1_r>,
235 <&qos_video_m1_w> 228 <&qos_video_m1_w>;
236 #power-domain-cells = <0>; 229 #power-domain-cells = <0>;
237 }; 230 };
238 power-domain@RK3399_PD_VIO { 231 power-domain@RK3399_PD_VIO {
239 reg = <RK3399_PD_VIO>; 232 reg = <RK3399_PD_VIO>;
240 #power-domain-cells = <1>; 233 #power-domain-cells = <1>;
241 #address-cells = <1>; 234 #address-cells = <1>;
242 #size-cells = <0>; 235 #size-cells = <0>;
243 236
244 power-domain@RK3399_PD_HDC 237 power-domain@RK3399_PD_HDCP {
245 reg = <RK3399_PD_HDCP> 238 reg = <RK3399_PD_HDCP>;
246 clocks = <&cru ACLK_HD 239 clocks = <&cru ACLK_HDCP>,
247 <&cru HCLK_HD 240 <&cru HCLK_HDCP>,
248 <&cru PCLK_HD 241 <&cru PCLK_HDCP>;
249 pm_qos = <&qos_hdcp>; 242 pm_qos = <&qos_hdcp>;
250 #power-domain-cells = 243 #power-domain-cells = <0>;
251 }; 244 };
252 }; 245 };
253 }; 246 };
254 }; 247 };
255 }; 248 };
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