1 # SPDX-License-Identifier: GPL-2.0 1 # SPDX-License-Identifier: GPL-2.0
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/power/rockc 4 $id: http://devicetree.org/schemas/power/rockchip,power-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: Rockchip Power Domains 7 title: Rockchip Power Domains
8 8
9 maintainers: 9 maintainers:
10 - Elaine Zhang <zhangqing@rock-chips.com> 10 - Elaine Zhang <zhangqing@rock-chips.com>
11 - Heiko Stuebner <heiko@sntech.de> 11 - Heiko Stuebner <heiko@sntech.de>
12 12
13 description: | 13 description: |
14 Rockchip processors include support for mult 14 Rockchip processors include support for multiple power domains
15 which can be powered up/down by software bas 15 which can be powered up/down by software based on different
16 application scenarios to save power. 16 application scenarios to save power.
17 17
18 Power domains contained within power-control 18 Power domains contained within power-controller node are
19 generic power domain providers documented in 19 generic power domain providers documented in
20 Documentation/devicetree/bindings/power/powe 20 Documentation/devicetree/bindings/power/power-domain.yaml.
21 21
22 IP cores belonging to a power domain should 22 IP cores belonging to a power domain should contain a
23 "power-domains" property that is a phandle f 23 "power-domains" property that is a phandle for the
24 power domain node representing the domain. 24 power domain node representing the domain.
25 25
26 properties: 26 properties:
27 $nodename: 27 $nodename:
28 const: power-controller 28 const: power-controller
29 29
30 compatible: 30 compatible:
31 enum: 31 enum:
32 - rockchip,px30-power-controller 32 - rockchip,px30-power-controller
33 - rockchip,rk3036-power-controller 33 - rockchip,rk3036-power-controller
34 - rockchip,rk3066-power-controller 34 - rockchip,rk3066-power-controller
35 - rockchip,rk3128-power-controller 35 - rockchip,rk3128-power-controller
36 - rockchip,rk3188-power-controller 36 - rockchip,rk3188-power-controller
37 - rockchip,rk3228-power-controller 37 - rockchip,rk3228-power-controller
38 - rockchip,rk3288-power-controller 38 - rockchip,rk3288-power-controller
39 - rockchip,rk3328-power-controller 39 - rockchip,rk3328-power-controller
40 - rockchip,rk3366-power-controller 40 - rockchip,rk3366-power-controller
41 - rockchip,rk3368-power-controller 41 - rockchip,rk3368-power-controller
42 - rockchip,rk3399-power-controller 42 - rockchip,rk3399-power-controller
43 - rockchip,rk3568-power-controller 43 - rockchip,rk3568-power-controller
44 - rockchip,rk3576-power-controller <<
45 - rockchip,rk3588-power-controller 44 - rockchip,rk3588-power-controller
46 - rockchip,rv1126-power-controller 45 - rockchip,rv1126-power-controller
47 46
48 "#power-domain-cells": 47 "#power-domain-cells":
49 const: 1 48 const: 1
50 49
51 "#address-cells": 50 "#address-cells":
52 const: 1 51 const: 1
53 52
54 "#size-cells": 53 "#size-cells":
55 const: 0 54 const: 0
56 55
57 required: 56 required:
58 - compatible 57 - compatible
59 - "#power-domain-cells" 58 - "#power-domain-cells"
60 59
61 additionalProperties: false 60 additionalProperties: false
62 61
63 patternProperties: 62 patternProperties:
64 "^power-domain@[0-9a-f]+$": 63 "^power-domain@[0-9a-f]+$":
65 64
66 $ref: "#/$defs/pd-node" 65 $ref: "#/$defs/pd-node"
67 66
68 unevaluatedProperties: false 67 unevaluatedProperties: false
69 68
70 properties: 69 properties:
71 "#address-cells": 70 "#address-cells":
72 const: 1 71 const: 1
73 72
74 "#size-cells": 73 "#size-cells":
75 const: 0 74 const: 0
76 75
77 patternProperties: 76 patternProperties:
78 "^power-domain@[0-9a-f]+$": 77 "^power-domain@[0-9a-f]+$":
79 78
80 $ref: "#/$defs/pd-node" 79 $ref: "#/$defs/pd-node"
81 80
82 unevaluatedProperties: false 81 unevaluatedProperties: false
83 82
84 properties: 83 properties:
85 "#address-cells": 84 "#address-cells":
86 const: 1 85 const: 1
87 86
88 "#size-cells": 87 "#size-cells":
89 const: 0 88 const: 0
90 89
91 patternProperties: 90 patternProperties:
92 "^power-domain@[0-9a-f]+$": 91 "^power-domain@[0-9a-f]+$":
93 92
94 $ref: "#/$defs/pd-node" 93 $ref: "#/$defs/pd-node"
95 94
96 unevaluatedProperties: false 95 unevaluatedProperties: false
97 96
98 properties: 97 properties:
99 "#power-domain-cells": 98 "#power-domain-cells":
100 const: 0 99 const: 0
101 100
102 $defs: 101 $defs:
103 pd-node: 102 pd-node:
104 type: object 103 type: object
105 description: | 104 description: |
106 Represents the power domains within the 105 Represents the power domains within the power controller node.
107 106
108 properties: 107 properties:
109 reg: 108 reg:
110 maxItems: 1 109 maxItems: 1
111 description: | 110 description: |
112 Power domain index. Valid values are 111 Power domain index. Valid values are defined in
113 "include/dt-bindings/power/px30-powe 112 "include/dt-bindings/power/px30-power.h"
114 "include/dt-bindings/power/rk3036-po 113 "include/dt-bindings/power/rk3036-power.h"
115 "include/dt-bindings/power/rk3066-po 114 "include/dt-bindings/power/rk3066-power.h"
116 "include/dt-bindings/power/rk3128-po 115 "include/dt-bindings/power/rk3128-power.h"
117 "include/dt-bindings/power/rk3188-po 116 "include/dt-bindings/power/rk3188-power.h"
118 "include/dt-bindings/power/rk3228-po 117 "include/dt-bindings/power/rk3228-power.h"
119 "include/dt-bindings/power/rk3288-po 118 "include/dt-bindings/power/rk3288-power.h"
120 "include/dt-bindings/power/rk3328-po 119 "include/dt-bindings/power/rk3328-power.h"
121 "include/dt-bindings/power/rk3366-po 120 "include/dt-bindings/power/rk3366-power.h"
122 "include/dt-bindings/power/rk3368-po 121 "include/dt-bindings/power/rk3368-power.h"
123 "include/dt-bindings/power/rk3399-po 122 "include/dt-bindings/power/rk3399-power.h"
124 "include/dt-bindings/power/rk3568-po 123 "include/dt-bindings/power/rk3568-power.h"
125 "include/dt-bindings/power/rk3588-po 124 "include/dt-bindings/power/rk3588-power.h"
126 "include/dt-bindings/power/rockchip, 125 "include/dt-bindings/power/rockchip,rv1126-power.h"
127 126
128 clocks: 127 clocks:
129 minItems: 1 128 minItems: 1
130 maxItems: 30 129 maxItems: 30
131 description: | 130 description: |
132 A number of phandles to clocks that 131 A number of phandles to clocks that need to be enabled
133 while power domain switches state. 132 while power domain switches state.
134 133
135 pm_qos: 134 pm_qos:
136 $ref: /schemas/types.yaml#/definitions 135 $ref: /schemas/types.yaml#/definitions/phandle-array
137 items: 136 items:
138 maxItems: 1 137 maxItems: 1
139 description: | 138 description: |
140 A number of phandles to qos blocks w 139 A number of phandles to qos blocks which need to be saved and restored
141 while power domain switches state. 140 while power domain switches state.
142 141
143 "#power-domain-cells": 142 "#power-domain-cells":
144 enum: [0, 1] 143 enum: [0, 1]
145 description: 144 description:
146 Must be 0 for nodes representing a s 145 Must be 0 for nodes representing a single PM domain and 1 for nodes
147 providing multiple PM domains. 146 providing multiple PM domains.
148 147
149 required: 148 required:
150 - reg 149 - reg
151 - "#power-domain-cells" 150 - "#power-domain-cells"
152 151
153 examples: 152 examples:
154 - | 153 - |
155 #include <dt-bindings/clock/rk3399-cru.h> 154 #include <dt-bindings/clock/rk3399-cru.h>
156 #include <dt-bindings/power/rk3399-power.h 155 #include <dt-bindings/power/rk3399-power.h>
157 156
158 soc { 157 soc {
159 #address-cells = <2>; 158 #address-cells = <2>;
160 #size-cells = <2>; 159 #size-cells = <2>;
161 160
162 qos_hdcp: qos@ffa90000 { 161 qos_hdcp: qos@ffa90000 {
163 compatible = "rockchip,rk3399-qos" 162 compatible = "rockchip,rk3399-qos", "syscon";
164 reg = <0x0 0xffa90000 0x0 0x20>; 163 reg = <0x0 0xffa90000 0x0 0x20>;
165 }; 164 };
166 165
167 qos_iep: qos@ffa98000 { 166 qos_iep: qos@ffa98000 {
168 compatible = "rockchip,rk3399-qos" 167 compatible = "rockchip,rk3399-qos", "syscon";
169 reg = <0x0 0xffa98000 0x0 0x20>; 168 reg = <0x0 0xffa98000 0x0 0x20>;
170 }; 169 };
171 170
172 qos_rga_r: qos@ffab0000 { 171 qos_rga_r: qos@ffab0000 {
173 compatible = "rockchip,rk3399-qos" 172 compatible = "rockchip,rk3399-qos", "syscon";
174 reg = <0x0 0xffab0000 0x0 0x20>; 173 reg = <0x0 0xffab0000 0x0 0x20>;
175 }; 174 };
176 175
177 qos_rga_w: qos@ffab0080 { 176 qos_rga_w: qos@ffab0080 {
178 compatible = "rockchip,rk3399-qos" 177 compatible = "rockchip,rk3399-qos", "syscon";
179 reg = <0x0 0xffab0080 0x0 0x20>; 178 reg = <0x0 0xffab0080 0x0 0x20>;
180 }; 179 };
181 180
182 qos_video_m0: qos@ffab8000 { 181 qos_video_m0: qos@ffab8000 {
183 compatible = "rockchip,rk3399-qos" 182 compatible = "rockchip,rk3399-qos", "syscon";
184 reg = <0x0 0xffab8000 0x0 0x20>; 183 reg = <0x0 0xffab8000 0x0 0x20>;
185 }; 184 };
186 185
187 qos_video_m1_r: qos@ffac0000 { 186 qos_video_m1_r: qos@ffac0000 {
188 compatible = "rockchip,rk3399-qos" 187 compatible = "rockchip,rk3399-qos", "syscon";
189 reg = <0x0 0xffac0000 0x0 0x20>; 188 reg = <0x0 0xffac0000 0x0 0x20>;
190 }; 189 };
191 190
192 qos_video_m1_w: qos@ffac0080 { 191 qos_video_m1_w: qos@ffac0080 {
193 compatible = "rockchip,rk3399-qos" 192 compatible = "rockchip,rk3399-qos", "syscon";
194 reg = <0x0 0xffac0080 0x0 0x20>; 193 reg = <0x0 0xffac0080 0x0 0x20>;
195 }; 194 };
196 195
197 power-management@ff310000 { 196 power-management@ff310000 {
198 compatible = "rockchip,rk3399-pmu" 197 compatible = "rockchip,rk3399-pmu", "syscon", "simple-mfd";
199 reg = <0x0 0xff310000 0x0 0x1000>; 198 reg = <0x0 0xff310000 0x0 0x1000>;
200 199
201 power-controller { 200 power-controller {
202 compatible = "rockchip,rk3399- 201 compatible = "rockchip,rk3399-power-controller";
203 #power-domain-cells = <1>; 202 #power-domain-cells = <1>;
204 #address-cells = <1>; 203 #address-cells = <1>;
205 #size-cells = <0>; 204 #size-cells = <0>;
206 205
207 /* These power domains are gro 206 /* These power domains are grouped by VD_CENTER */
208 power-domain@RK3399_PD_IEP { 207 power-domain@RK3399_PD_IEP {
209 reg = <RK3399_PD_IEP>; 208 reg = <RK3399_PD_IEP>;
210 clocks = <&cru ACLK_IEP>, 209 clocks = <&cru ACLK_IEP>,
211 <&cru HCLK_IEP>; 210 <&cru HCLK_IEP>;
212 pm_qos = <&qos_iep>; 211 pm_qos = <&qos_iep>;
213 #power-domain-cells = <0>; 212 #power-domain-cells = <0>;
214 }; 213 };
215 power-domain@RK3399_PD_RGA { 214 power-domain@RK3399_PD_RGA {
216 reg = <RK3399_PD_RGA>; 215 reg = <RK3399_PD_RGA>;
217 clocks = <&cru ACLK_RGA>, 216 clocks = <&cru ACLK_RGA>,
218 <&cru HCLK_RGA>; 217 <&cru HCLK_RGA>;
219 pm_qos = <&qos_rga_r>, 218 pm_qos = <&qos_rga_r>,
220 <&qos_rga_w>; 219 <&qos_rga_w>;
221 #power-domain-cells = <0>; 220 #power-domain-cells = <0>;
222 }; 221 };
223 power-domain@RK3399_PD_VCODEC 222 power-domain@RK3399_PD_VCODEC {
224 reg = <RK3399_PD_VCODEC>; 223 reg = <RK3399_PD_VCODEC>;
225 clocks = <&cru ACLK_VCODEC 224 clocks = <&cru ACLK_VCODEC>,
226 <&cru HCLK_VCODEC 225 <&cru HCLK_VCODEC>;
227 pm_qos = <&qos_video_m0>; 226 pm_qos = <&qos_video_m0>;
228 #power-domain-cells = <0>; 227 #power-domain-cells = <0>;
229 }; 228 };
230 power-domain@RK3399_PD_VDU { 229 power-domain@RK3399_PD_VDU {
231 reg = <RK3399_PD_VDU>; 230 reg = <RK3399_PD_VDU>;
232 clocks = <&cru ACLK_VDU>, 231 clocks = <&cru ACLK_VDU>,
233 <&cru HCLK_VDU>; 232 <&cru HCLK_VDU>;
234 pm_qos = <&qos_video_m1_r> 233 pm_qos = <&qos_video_m1_r>,
235 <&qos_video_m1_w> 234 <&qos_video_m1_w>;
236 #power-domain-cells = <0>; 235 #power-domain-cells = <0>;
237 }; 236 };
238 power-domain@RK3399_PD_VIO { 237 power-domain@RK3399_PD_VIO {
239 reg = <RK3399_PD_VIO>; 238 reg = <RK3399_PD_VIO>;
240 #power-domain-cells = <1>; 239 #power-domain-cells = <1>;
241 #address-cells = <1>; 240 #address-cells = <1>;
242 #size-cells = <0>; 241 #size-cells = <0>;
243 242
244 power-domain@RK3399_PD_HDC 243 power-domain@RK3399_PD_HDCP {
245 reg = <RK3399_PD_HDCP> 244 reg = <RK3399_PD_HDCP>;
246 clocks = <&cru ACLK_HD 245 clocks = <&cru ACLK_HDCP>,
247 <&cru HCLK_HD 246 <&cru HCLK_HDCP>,
248 <&cru PCLK_HD 247 <&cru PCLK_HDCP>;
249 pm_qos = <&qos_hdcp>; 248 pm_qos = <&qos_hdcp>;
250 #power-domain-cells = 249 #power-domain-cells = <0>;
251 }; 250 };
252 }; 251 };
253 }; 252 };
254 }; 253 };
255 }; 254 };
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