1 # SPDX-License-Identifier: (GPL-2.0-only OR BS 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/pwm/imx-pwm 4 $id: http://devicetree.org/schemas/pwm/imx-pwm.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: Freescale i.MX PWM controller 7 title: Freescale i.MX PWM controller
8 8
9 maintainers: 9 maintainers:
10 - Philipp Zabel <p.zabel@pengutronix.de> 10 - Philipp Zabel <p.zabel@pengutronix.de>
11 11
12 allOf: 12 allOf:
13 - $ref: pwm.yaml# 13 - $ref: pwm.yaml#
14 14
15 properties: 15 properties:
16 "#pwm-cells": 16 "#pwm-cells":
17 description: 17 description:
18 The only third cell flag supported by th 18 The only third cell flag supported by this binding is
19 PWM_POLARITY_INVERTED. fsl,imx1-pwm does 19 PWM_POLARITY_INVERTED. fsl,imx1-pwm does not support this flags.
20 const: 3 20 const: 3
21 21
22 compatible: 22 compatible:
23 oneOf: 23 oneOf:
24 - enum: 24 - enum:
25 - fsl,imx1-pwm 25 - fsl,imx1-pwm
26 - fsl,imx27-pwm 26 - fsl,imx27-pwm
27 - items: 27 - items:
28 - enum: 28 - enum:
29 - fsl,imx25-pwm 29 - fsl,imx25-pwm
30 - fsl,imx31-pwm 30 - fsl,imx31-pwm
31 - fsl,imx50-pwm 31 - fsl,imx50-pwm
32 - fsl,imx51-pwm 32 - fsl,imx51-pwm
33 - fsl,imx53-pwm 33 - fsl,imx53-pwm
34 - fsl,imx6q-pwm 34 - fsl,imx6q-pwm
35 - fsl,imx6sl-pwm 35 - fsl,imx6sl-pwm
36 - fsl,imx6sll-pwm 36 - fsl,imx6sll-pwm
37 - fsl,imx6sx-pwm 37 - fsl,imx6sx-pwm
38 - fsl,imx6ul-pwm 38 - fsl,imx6ul-pwm
39 - fsl,imx7d-pwm 39 - fsl,imx7d-pwm
40 - fsl,imx8mm-pwm 40 - fsl,imx8mm-pwm
41 - fsl,imx8mn-pwm 41 - fsl,imx8mn-pwm
42 - fsl,imx8mp-pwm 42 - fsl,imx8mp-pwm
43 - fsl,imx8mq-pwm 43 - fsl,imx8mq-pwm
44 - fsl,imx8qxp-pwm 44 - fsl,imx8qxp-pwm
45 - const: fsl,imx27-pwm 45 - const: fsl,imx27-pwm
46 46
47 reg: 47 reg:
48 maxItems: 1 48 maxItems: 1
49 49
50 clocks: 50 clocks:
51 items: 51 items:
52 - description: SoC PWM ipg clock 52 - description: SoC PWM ipg clock
53 - description: SoC PWM per clock 53 - description: SoC PWM per clock
54 54
55 clock-names: 55 clock-names:
56 items: 56 items:
57 - const: ipg 57 - const: ipg
58 - const: per 58 - const: per
59 59
60 interrupts: 60 interrupts:
61 maxItems: 1 61 maxItems: 1
62 62
63 power-domains: 63 power-domains:
64 maxItems: 1 64 maxItems: 1
65 65
66 required: 66 required:
67 - compatible 67 - compatible
68 - reg 68 - reg
69 - clocks 69 - clocks
70 - clock-names 70 - clock-names
71 71
72 additionalProperties: false 72 additionalProperties: false
73 73
74 examples: 74 examples:
75 - | 75 - |
76 #include <dt-bindings/clock/imx5-clock.h> 76 #include <dt-bindings/clock/imx5-clock.h>
77 77
78 pwm@53fb4000 { 78 pwm@53fb4000 {
79 #pwm-cells = <3>; 79 #pwm-cells = <3>;
80 compatible = "fsl,imx27-pwm"; 80 compatible = "fsl,imx27-pwm";
81 reg = <0x53fb4000 0x4000>; 81 reg = <0x53fb4000 0x4000>;
82 clocks = <&clks IMX5_CLK_PWM1_IPG_GATE 82 clocks = <&clks IMX5_CLK_PWM1_IPG_GATE>,
83 <&clks IMX5_CLK_PWM1_HF_GATE> 83 <&clks IMX5_CLK_PWM1_HF_GATE>;
84 clock-names = "ipg", "per"; 84 clock-names = "ipg", "per";
85 interrupts = <61>; 85 interrupts = <61>;
86 }; 86 };
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