1 # SPDX-License-Identifier: (GPL-2.0-only OR BS 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/pwm/imx-pwm 4 $id: http://devicetree.org/schemas/pwm/imx-pwm.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: Freescale i.MX PWM controller 7 title: Freescale i.MX PWM controller
8 8
9 maintainers: 9 maintainers:
10 - Philipp Zabel <p.zabel@pengutronix.de> 10 - Philipp Zabel <p.zabel@pengutronix.de>
11 11
12 allOf: <<
13 - $ref: pwm.yaml# <<
14 <<
15 properties: 12 properties:
16 "#pwm-cells": 13 "#pwm-cells":
17 description: !! 14 description: |
18 The only third cell flag supported by th !! 15 Should be 2 for i.MX1 and 3 for i.MX27 and newer SoCs. See pwm.yaml
19 PWM_POLARITY_INVERTED. fsl,imx1-pwm does !! 16 in this directory for a description of the cells format.
20 const: 3 !! 17 enum:
>> 18 - 2
>> 19 - 3
21 20
22 compatible: 21 compatible:
23 oneOf: 22 oneOf:
24 - enum: 23 - enum:
25 - fsl,imx1-pwm 24 - fsl,imx1-pwm
26 - fsl,imx27-pwm 25 - fsl,imx27-pwm
27 - items: 26 - items:
28 - enum: 27 - enum:
29 - fsl,imx25-pwm 28 - fsl,imx25-pwm
30 - fsl,imx31-pwm 29 - fsl,imx31-pwm
31 - fsl,imx50-pwm 30 - fsl,imx50-pwm
32 - fsl,imx51-pwm 31 - fsl,imx51-pwm
33 - fsl,imx53-pwm 32 - fsl,imx53-pwm
34 - fsl,imx6q-pwm 33 - fsl,imx6q-pwm
35 - fsl,imx6sl-pwm 34 - fsl,imx6sl-pwm
36 - fsl,imx6sll-pwm 35 - fsl,imx6sll-pwm
37 - fsl,imx6sx-pwm 36 - fsl,imx6sx-pwm
38 - fsl,imx6ul-pwm 37 - fsl,imx6ul-pwm
39 - fsl,imx7d-pwm 38 - fsl,imx7d-pwm
40 - fsl,imx8mm-pwm 39 - fsl,imx8mm-pwm
41 - fsl,imx8mn-pwm 40 - fsl,imx8mn-pwm
42 - fsl,imx8mp-pwm 41 - fsl,imx8mp-pwm
43 - fsl,imx8mq-pwm 42 - fsl,imx8mq-pwm
44 - fsl,imx8qxp-pwm <<
45 - const: fsl,imx27-pwm 43 - const: fsl,imx27-pwm
46 44
47 reg: 45 reg:
48 maxItems: 1 46 maxItems: 1
49 47
50 clocks: 48 clocks:
51 items: 49 items:
52 - description: SoC PWM ipg clock 50 - description: SoC PWM ipg clock
53 - description: SoC PWM per clock 51 - description: SoC PWM per clock
54 52
55 clock-names: 53 clock-names:
56 items: 54 items:
57 - const: ipg 55 - const: ipg
58 - const: per 56 - const: per
59 57
60 interrupts: 58 interrupts:
61 maxItems: 1 59 maxItems: 1
62 60
63 power-domains: <<
64 maxItems: 1 <<
65 <<
66 required: 61 required:
>> 62 - "#pwm-cells"
67 - compatible 63 - compatible
68 - reg 64 - reg
69 - clocks 65 - clocks
70 - clock-names 66 - clock-names
>> 67 - interrupts
71 68
72 additionalProperties: false 69 additionalProperties: false
73 70
74 examples: 71 examples:
75 - | 72 - |
76 #include <dt-bindings/clock/imx5-clock.h> 73 #include <dt-bindings/clock/imx5-clock.h>
77 74
78 pwm@53fb4000 { 75 pwm@53fb4000 {
79 #pwm-cells = <3>; 76 #pwm-cells = <3>;
80 compatible = "fsl,imx27-pwm"; 77 compatible = "fsl,imx27-pwm";
81 reg = <0x53fb4000 0x4000>; 78 reg = <0x53fb4000 0x4000>;
82 clocks = <&clks IMX5_CLK_PWM1_IPG_GATE 79 clocks = <&clks IMX5_CLK_PWM1_IPG_GATE>,
83 <&clks IMX5_CLK_PWM1_HF_GATE> 80 <&clks IMX5_CLK_PWM1_HF_GATE>;
84 clock-names = "ipg", "per"; 81 clock-names = "ipg", "per";
85 interrupts = <61>; 82 interrupts = <61>;
86 }; 83 };
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